The USARTn.TXDATAH register holds the
ninth data bit in the character to be transmitted when operating with serial frames with
nine data bits. When used, this bit must be written before writing to the USARTn.TXDATAL
register except if the CHSIZE bits in the USARTn.CTRLC register are is set to 9BIT low
byte first, where the USARTn.TXDATAL register should be written first.
This bit is unused in Master SPI mode of operation.
Name:
TXDATAH
Offset:
0x03
Reset:
0x00
Property:
-
Bit
7
6
5
4
3
2
1
0
DATA[8]
Access
R/W
Reset
0
Bit 0 – DATA[8] Transmit Data
Register
This bit is used
when CHSIZE=9BIT in the USARTn.CTRLC register.
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