25.5.6 Control A
| Name: | CTRLA |
| Offset: | 0x05 |
| Reset: | 0x00 |
| Property: | - |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| | RXCIE | TXCIE | DREIE | RXSIE | LBME | ABEIE | RS485[1:0] | |
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
Bit 7 – RXCIE Receive Complete
Interrupt Enable
This bit enables the
Receive Complete interrupt (interrupt vector RXC). The enabled interrupt will be
triggered when the RXCIF bit in the USARTn.STATUS register is
set.
Bit 6 – TXCIE Transmit Complete
Interrupt Enable
This bit enables the
Transmit Complete interrupt (interrupt vector TXC). The enabled interrupt will be
triggered when the TXCIF bit in the USARTn.STATUS register is
set.
Bit 5 – DREIE Data Register Empty
Interrupt Enable
This bit enables the
Data Register Empty interrupt (interrupt vector DRE). The enabled interrupt will be
triggered when the DREIF bit in the USART.STATUS register is
set.
Bit 4 – RXSIE Receiver Start
Frame Interrupt Enable
Writing a
‘1’ to this bit enables the Start Frame Detector to generate an
interrupt on interrupt vector RXC when a Start-of-Frame condition is
detected.
Bit 3 – LBME Loop-back Mode
Enable
Writing a
‘1’ to this bit enables an internal connection between the TXD
pin and the USART receiver and disables input from the RXD pin to the USART
receiver.
Bit 2 – ABEIE Auto-baud Error
Interrupt Enable
Writing a
‘1’ to this bit enables the auto-baud error interrupt on
interrupt vector RXC. The enabled interrupt will trigger for conditions where the
ISFIF flag is set.
Bits 1:0 – RS485[1:0] RS-485
Mode
These bits enable
the RS-485 and select the operation mode. Writing RS485[0] to ‘1’
enables the RS-485 mode which automatically drives the XDIR pin high one clock cycle
before starting transmission and pulls it low again when the transmission is
complete. Writing RS485[1] to ‘1’ enables the RS-485 mode which
automatically sets the TXD pin to output one clock cycle before starting
transmission and sets it back to input when the transmission is
complete.
