27.3.2.2.3.2 Case M2: Address
Packet Transmit Complete - Direction Bit Set to ‘1
’
If a slave device responds to the address
packet with an ACK, the RXACK flag is set to ‘0
’, and the slave can start
sending data to the master without any delays because the slave owns the bus at this
moment. The clock hold is active at this point, forcing the SCL low.
The software can prepare to:
- Read the received data packet from the slave