18.2.1 Power and Ground

The following are the recommendations for a better design with respect to power and ground.

• Dedicate one layer as a ground plane with a copper polygon pour running throughout the plane. Make sure this ground plane is not broken up by any signal traces. This ground layer must be selected to be immediately below the layer containing the RF traces routed from the ATSAMR30 IC to the antenna.
• Place sufficient ground vias throughout the board to ensure the inductance to the ground path is the least possible.
• It is recommended that all power supply traces have heavy copper fill planes to ensure the lowest possible inductance.
• It is recommended that all decoupling capacitors have a dedicated ground via placed next to the capacitor pad. These capacitors must be placed as close as possible to the IC pin that it is filtering.

  

  

• Wherever possible, avoid using the switched mode power supply to source the SAMR30 as the noise induced in the power rail can impact the RF performance. Microchip recommends using LDO for sourcing the SAMR30. If this is unavoidable, add a sufficient noise filter circuit to ensure the power rail is clean from high frequency noise ripples.
• The center ground paddle of the ATSAMR30 device must be solidly interfaced to the ground plane through a grid of 3x3 ground vias, as shown in the following figure. It is recommended that the minimum via be 0.3 mm hole size and 0.75 mm drill size.