24.1 Rev. C - 03/2021

SectionDescription
Features
  • Updated the description of memories
  • Updated the number of external interrupts as 16
  • Updated the number of DMAC channels as 16
  • Updated the number of TCC
  • Updated the speed of ADC as 1 MSPS
  • Removed programmable gain stage information of ADC
  • Updated the capacitive touch channel as 18
  • Added support for wake-up on touch in standby mode for PTC
  • Updated the peripherals information
Description
  • Updated the number of PTC supported buttons as 18
  • Updated the number of software selectable sleep modes as three
  • Removed support for OFF state
Configuration Summary
  • Updated the number of instances for SAM R30E TC as 3
  • Updated the number of external interrupt lines for SAM R30G as 16
  • Updated the channels of PTC as 6x3 for SAM R30G and 4x3 for SAM R30E
  • Added PTC channels for self-capacitance
  • Removed the support for OSC8M
  • Added the support for OSC16M
MCU Block DiagramRemoved VREFA signal for ADC
Multiplexed Signals
  • Updated the peripheral signals of REF and TCC in Port Function Multiplexing table
  • Updated the supply for SAM R30E I/O pin PB22 and PB23 as VDDIN
SERCOM I2C PinsRemoved PA22 and PA23 pins support for SAMR30E
Signal DescriptionUpdated PORT signal details
Power Domain OverviewRemoved DAC, OPAMP, and TRNG from the block diagram
Power SuppliesRemoved support for DAC and OPAMP
NVM Temperature Log RowAdded new section
ProgrammingUpdated the reference for POR threshold
DSUUpdated the following registers:
  • ADDR
  • DID
Clock Distribution
  • Updated the figure
  • Added information on how to customize the clock distribution
Clocks after ResetUpdated the section
GCLKUpdated the following register:
  • SYNCBUSY
  • PCHCTRLm
MCLKAdded BUP details
Sleep Mode OperationEditorial updates
PM - Features
  • Removed support for OFF mode
  • Updated the performance levels as PL0 and PL2
Power DomainsAdded Power Domain Partitioning figure
PD1Removed support for AES and TRNG peripheral
PDTOPAdded new section
Sleep Mode Controller
  • In Sleep Mode Entry and Exit Table updated Mode Entry for IDLE mode and removed OFF mode details
  • Removed OFF mode information from Sleep Mode Overview table
BACKUP ModeUpdated the title name
OFF ModeRemoved this section
Performance LevelUpdated Sleep Modes and Performance Level Transitions figure
Power Domain ControllerRemoved OFF mode details in Sleep Mode versus Power Domain State Overview table
Regulators, RAMs, and NVM State in Sleep ModeRemoved OFF mode details in Regulators, RAMs, and NVM state in Sleep Mode table
PM Updated SLEEPCFG register
OSCCTRLUpdated DPLLCTRLB register
32KHz External Crystal Oscillator (XOSC32K) OperationUpdated XOSC32KCTRL as XOSC32K
32KHz Internal Oscillator (OSC32K) OperationUpdated OSC32KCTRL as OSC32K
OSC32KCTRLUpdated OSCULP32K register
Brown-Out DetectorsUpdated BODVDD as BOD33
RTC - FeaturesUpdated the number of number of general purpose registers from 4 as 2
32-Bit Counter (Mode 0)Editorial updates
16-Bit Counter (Mode 1)Editorial updates
Clock/Calendar (Mode 2)Updated the section
RTCUpdated the following registers:
  • SYNCBUSY register in COUNT32 mode
  • FREQCORR register in COUNT32 mode
  • COMPn register in COUNT32 mode
  • GPn register in COUNT32 mode
  • FREQCORR register in COUNT16 mode
  • COMPn register in COUNT16 mode
  • SYNCBUSY register in Clock mode
  • FREQCORR register in Clock mode
  • Updated ALARMn register in Clock mode
  • GPn register in Clock mode
DMAC - Principle of OperationRemoved Burst transfer content
DMAC - Sleep Mode OperationUpdated the section
DMACUpdated the following register:
  • CTRL
  • PENDCH
  • CHCTRLB
  • BTCTRL
EIC - FeaturesEditorial updates
EIC - InterruptsAdded a note
EICUpdated the following register:
  • CTRLA
  • NMICTRL
  • EVCTRL
  • INTENCLR
  • INTENSET
  • INTFLAG
  • ASYNCH
  • CONFIG
NVMCTRL - FeaturesUpdated the number of regions
NVMCTRL - Memory OrganizationAdded related links
NVMCTRL - NVM User ConfigurationAdded related links
PORT - Register DescriptionAdded a Tip
PORTUpdated the following register:
  • CTRL
  • EVCTRL
  • PMUX
  • PINCFG
EVSYS - InitializationUpdated the section
EVSYSUpdated the following register:
  • CHANNELn
  • USERm
SERCOM USART - ClocksAdded Related Links
SERCOM USART - InitializationUpdated the section
SERCOM SPIUpdated the following register:
  • INTENCLR
  • INTENSET
TCRegister Summary and Register Description sections are regrouped
TCAdded the following registers for 16-bit and 32-bit modes:
  • PER
  • PERBUF
TCUpdated the following register:
  • CTRLA
  • STATUS
  • CCx for 16-bit and 32-bit mode
TCC
  • Updated the following register:
    • INTENCLR
    • PER
USB - OverviewUpdated the section
USBUpdated the following register:
  • QOSCTRL
  • STATUS
  • EPSTATUSCLRn
  • EPSTATUSSETn
  • EPSTATUSn
  • EPINTFLAGn
  • STATUS_BK
CCL - OverviewEditorial updates
CCL - Signal DescriptionUpdated the pin names and added a note
CCL - Debug OperationUpdated the section
CCL - Principle of OperationUpdated the section
CCL - InitializationUpdated the section
CCL - Internal Events Inputs Selection (EVENT)Updated the section
ADC- Block DiagramRemoved VREFA signal from the block diagram
ADC - Signal DescriptionRemoved VREFA signal from the Signal Description table
ADC - Analog ConnectionsUpdated the section
ADC - Prescaler SelectionUpdated the section
ADC - Reference ConfigurationUpdated the section
ADC - Additional FeaturesAdded new sections
ADCUpdated the REFCTRL register
ACUpdated the following register:
  • CTRLB
  • STATUSA
  • STATUSB
  • SYNCBUSY
  • COMPCTRL
PTC - OverviewUpdated the section
PTC - FeaturesUpdated the section
RFCTRL - Functional DescriptionEditorial updates
RFCTRLUpdated the FECTRL register
Reference Guide - AT86RF212B - Spreading, Modulation, and Pulse ShapingAdded Base Band Transmitter Architecture figure
Reference Guide - AT86RF212B - RX/TX IndicatorUpdated the section title
Electrical Characteristics - Wake-Up TimeRemoved OFF mode details from Wake-Up Timing table
Design ConsiderationsAdded a new chapter
Acronyms and AbbreviationsEditorial updates
DocumentRearranged the chapter 6 and 7