24.1 Rev. C - 03/2021

Section Description
Features
  • Updated the description of memories
  • Updated the number of external interrupts as 16
  • Updated the number of DMAC channels as 16
  • Updated the number of TCC
  • Updated the speed of ADC as 1 MSPS
  • Removed programmable gain stage information of ADC
  • Updated the capacitive touch channel as 18
  • Added support for wake-up on touch in standby mode for PTC
  • Updated the peripherals information
Description
  • Updated the number of PTC supported buttons as 18
  • Updated the number of software selectable sleep modes as three
  • Removed support for OFF state
Configuration Summary
  • Updated the number of instances for SAM R30E TC as 3
  • Updated the number of external interrupt lines for SAM R30G as 16
  • Updated the channels of PTC as 6x3 for SAM R30G and 4x3 for SAM R30E
  • Added PTC channels for self-capacitance
  • Removed the support for OSC8M
  • Added the support for OSC16M
MCU Block Diagram Removed VREFA signal for ADC
Multiplexed Signals
  • Updated the peripheral signals of REF and TCC in Port Function Multiplexing table
  • Updated the supply for SAM R30E I/O pin PB22 and PB23 as VDDIN
SERCOM I2C Pins Removed PA22 and PA23 pins support for SAMR30E
Signal Description Updated PORT signal details
Power Domain Overview Removed DAC, OPAMP, and TRNG from the block diagram
Power Supplies Removed support for DAC and OPAMP
NVM Temperature Log Row Added new section
Programming Updated the reference for POR threshold
DSU Updated the following registers:
  • ADDR
  • DID
Clock Distribution
  • Updated the figure
  • Added information on how to customize the clock distribution
Clocks after Reset Updated the section
GCLK Updated the following register:
  • SYNCBUSY
  • PCHCTRLm
MCLK Added BUP details
Sleep Mode Operation Editorial updates
PM - Features
  • Removed support for OFF mode
  • Updated the performance levels as PL0 and PL2
Power Domains Added Power Domain Partitioning figure
PD1 Removed support for AES and TRNG peripheral
PDTOP Added new section
Sleep Mode Controller
  • In Sleep Mode Entry and Exit Table updated Mode Entry for IDLE mode and removed OFF mode details
  • Removed OFF mode information from Sleep Mode Overview table
BACKUP Mode Updated the title name
OFF Mode Removed this section
Performance Level Updated Sleep Modes and Performance Level Transitions figure
Power Domain Controller Removed OFF mode details in Sleep Mode versus Power Domain State Overview table
Regulators, RAMs, and NVM State in Sleep Mode Removed OFF mode details in Regulators, RAMs, and NVM state in Sleep Mode table
PM Updated SLEEPCFG register
OSCCTRL Updated DPLLCTRLB register
32KHz External Crystal Oscillator (XOSC32K) Operation Updated XOSC32KCTRL as XOSC32K
32KHz Internal Oscillator (OSC32K) Operation Updated OSC32KCTRL as OSC32K
OSC32KCTRL Updated OSCULP32K register
Brown-Out Detectors Updated BODVDD as BOD33
RTC - Features Updated the number of number of general purpose registers from 4 as 2
32-Bit Counter (Mode 0) Editorial updates
16-Bit Counter (Mode 1) Editorial updates
Clock/Calendar (Mode 2) Updated the section
RTC Updated the following registers:
  • SYNCBUSY register in COUNT32 mode
  • FREQCORR register in COUNT32 mode
  • COMPn register in COUNT32 mode
  • GPn register in COUNT32 mode
  • FREQCORR register in COUNT16 mode
  • COMPn register in COUNT16 mode
  • SYNCBUSY register in Clock mode
  • FREQCORR register in Clock mode
  • Updated ALARMn register in Clock mode
  • GPn register in Clock mode
DMAC - Principle of Operation Removed Burst transfer content
DMAC - Sleep Mode Operation Updated the section
DMAC Updated the following register:
  • CTRL
  • PENDCH
  • CHCTRLB
  • BTCTRL
EIC - Features Editorial updates
EIC - Interrupts Added a note
EIC Updated the following register:
  • CTRLA
  • NMICTRL
  • EVCTRL
  • INTENCLR
  • INTENSET
  • INTFLAG
  • ASYNCH
  • CONFIG
NVMCTRL - Features Updated the number of regions
NVMCTRL - Memory Organization Added related links
NVMCTRL - NVM User Configuration Added related links
PORT - Register Description Added a Tip
PORT Updated the following register:
  • CTRL
  • EVCTRL
  • PMUX
  • PINCFG
EVSYS - Initialization Updated the section
EVSYS Updated the following register:
  • CHANNELn
  • USERm
SERCOM USART - Clocks Added Related Links
SERCOM USART - Initialization Updated the section
SERCOM SPI Updated the following register:
  • INTENCLR
  • INTENSET
TC Register Summary and Register Description sections are regrouped
TC Added the following registers for 16-bit and 32-bit modes:
  • PER
  • PERBUF
TC Updated the following register:
  • CTRLA
  • STATUS
  • CCx for 16-bit and 32-bit mode
TCC
  • Updated the following register:
    • INTENCLR
    • PER
USB - Overview Updated the section
USB Updated the following register:
  • QOSCTRL
  • STATUS
  • EPSTATUSCLRn
  • EPSTATUSSETn
  • EPSTATUSn
  • EPINTFLAGn
  • STATUS_BK
CCL - Overview Editorial updates
CCL - Signal Description Updated the pin names and added a note
CCL - Debug Operation Updated the section
CCL - Principle of Operation Updated the section
CCL - Initialization Updated the section
CCL - Internal Events Inputs Selection (EVENT) Updated the section
ADC- Block Diagram Removed VREFA signal from the block diagram
ADC - Signal Description Removed VREFA signal from the Signal Description table
ADC - Analog Connections Updated the section
ADC - Prescaler Selection Updated the section
ADC - Reference Configuration Updated the section
ADC - Additional Features Added new sections
ADC Updated the REFCTRL register
AC Updated the following register:
  • CTRLB
  • STATUSA
  • STATUSB
  • SYNCBUSY
  • COMPCTRL
PTC - Overview Updated the section
PTC - Features Updated the section
RFCTRL - Functional Description Editorial updates
RFCTRL Updated the FECTRL register
Reference Guide - AT86RF212B - Spreading, Modulation, and Pulse Shaping Added Base Band Transmitter Architecture figure
Reference Guide - AT86RF212B - RX/TX Indicator Updated the section title
Electrical Characteristics - Wake-Up Time Removed OFF mode details from Wake-Up Timing table
Design Considerations Added a new chapter
Acronyms and Abbreviations Editorial updates
Document Rearranged the chapter 6 and 7