12.1 SAM R30 Basic Application Schematic

Mandatory circuit elements to operate the SAM R30 system in package

The schematic drawing shows the mandatory external circuit for the SAM R30 system. This circuit is required in the same way for the package configurations with 32 or 48 pins. The package variants are different in terms of the available controller IO pins. These pins are not shown in the application schematic drawing.

Unused pins that are not shown in the drawing can be left open. Keep in mind that the software has to initialize floating pins to a valid static state. For an open IO this can be a configuration as output with ether high or low level output. For a floating input pins it is recommended to activate internal pull resistors to ensure a steady high or low state. Input pins that are floating at levels above the maximum low voltage or minimum high voltage will cause additional supply current consumption. It will not be possible to achieve the specified sleep current values with floating input pins within the system. This is also valid for input pins that are wired to an unused connector. Consider to add large pull resistors (e.g. 1MΩ) to input signals where there is no guaranteed driving source.

The paddle (AKA heatsink) on the bottom of the QFN package is an active ground pin. On SAM R30 the paddle is bonded to the digital ground substrate of the CPU, or GND signal. Because the SAM R30 is a low power device the thermal output is minimal. However, a solid ground connection to the paddle is necessary. The paddle land area should be connected to the inner digital ground planes with several vias. The GND pins can be directly connected to the paddle land area as long as at least one via to the system digital ground is provided. The GNDANA signal should be treated as an independent ground domain. The GNDANA pins adjacent the RFP and RFN ports need to have a direct low-impedance connection to the RF ground plane of the system. This increases both the TX and RX signal strength and reduces phase noise. PCB layout should be separate GND and GNDANA structures to reduce common impedance coupling of ground return currents. GND and GNDANA should only be connected at one single point in a ‘star ground’ pattern. The connection point can be near the IC or Power Supply.

Please consider additional information in the pin description and signal description sections during schematic design.

Figure 12-1. SAM R30 Basic Application Schematic

Table 12-1. Example Bill of Materials (BoM) for the Basic Application Schematic.
Symbol	Description	Value	Manufacturer	Part Number	Comment
B1	SMD balun	800 – 1000MHz	Wuerth JTI	748431090 0900BL18B100	Differential to singe ended transformer. Does not contain any harmonic filter.
F1	Low Pass Filter	Specific for application frequency range			1)
B1, F1, C1, C2	Balun/Filter combination	863 – 928MHz	JTI	0896BM15A0032	Custom matching for AT86RF212B
B1, F1, C1, C2	Balun/Filter combination	779 – 787MHz	JTI	0783FB15A0100	validation pending
C1, C2	C0G, 5%, 0402, 50V	100pF	Murata	GRM1555C1H101JA01	DC blocking 2)
CX1, CX2	C0G, 5%, 0402, 50V	10pF	Murata	GRM1555C1H100JA01	Crystal load capacitor for XTAL with CL=9pF
CB1	X5R, 20%, 10V, 0402	1uF	Murata	GRM153R61A105ME95	Transceiver analog core voltage bypass
CB3	X5R, 20%, 10V, 0402	1uF	Murata	GRM153R61A105ME95	Transceiver digital core voltage bypass
CB6	X5R, 20%, 10V, 0402	1uF	Murata	GRM153R61A105ME95	CPU digital core voltage bypass
CB2	X5R, 20%, 10V, 0402	1uF	Murata	GRM153R61A105ME95	Analog supply voltage input bypass
CB4, CB5	X5R, 20%, 6.3V, 0402	4.7uF	Murata	GRM155R60J475ME87	Digital supply voltage input bypass
XTAL	Crystal, 16MHz, 10ppm@25°C, 15ppm over temperature, CL=9pF	CX-4025 16MHz SX-4025 16MHz SMD 2x2.5mm 16MHz	ACAL Taitjen Siward TAI-SAW Technology	XWBBPL-F-1 A207-011 TZ1670C	3)

Note: 1)

The required filter depends on the deployment region. For Sub-1GHz countries have defined individual limits for spurious emissions and different frequency ranges for license free radio applications.

Chinese WPAN band from 779 to 787MHz
European SRD band from 863 to 870MHz
North American ISM band from 902 to 928MHz
Japanese band from 915 to 930MHz

Note: 2)

For technical reasons the internal bias voltage is available at the RF pins RFP and RFN. This voltage shall not be loaded with a considerable current. It the chosen balun has a DC path to ground or the single ended output then C1 and C2 are required to isolate potential DC current.

Note: 3)

The crystal start-up time will strongly depend on the ESR parameter. The smaller the crystal, the higher the typical ESR value. A small crystal with eg. 80Ohm ESR may take up to 2ms for stable operation while a larger part with an ESR of 30Ohm may start faster than 1ms. This may be considered when selecting crystals for low power applications where the start-up time matters for the over all power consumption. A larger CL value can increase the immunity against EMI or xtalk. At the same time the start-up time is increased. In case of a changed CL value, the CX capacitors need to be changed accordingly.