17.5.5 Real-Time Timer Modulo Selection Register
This register can only be written if the WPEN bit is cleared in the System Controller Write Protection Mode register (SYSC_WPMR).
| Name: | RTT_MODR |
| Offset: | 0x10 |
| Reset: | 0x00000000 |
| Property: | Read/Write |
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| Access | |||||||||
| Reset |
| Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| Access | |||||||||
| Reset |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| Access | |||||||||
| Reset |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| SELINC2[2:0] | |||||||||
| Access | R/W | R/W | R/W | ||||||
| Reset | 0 | 0 | 0 | ||||||
Bits 2:0 – SELINC2[2:0] Selection of the 32-bit Counter Modulo to generate RTTINC2 Flag
| Value | Name | Description |
|---|---|---|
| 0 | NO_RTTINC2 | The RTTINC2 flag never rises. |
| 1 | MOD64 | The RTTINC2 flag is set when CRTV modulo 64 equals 0. |
| 2 | MOD128 | The RTTINC2 flag is set when CRTV modulo 128 equals 0. |
| 3 | MOD256 | The RTTINC2 flag is set when CRTV modulo 256 equals 0. |
| 4 | MOD512 | The RTTINC2 flag is set when CRTV modulo 512 equals 0. |
| 5 | MOD1024 | The RTTINC2 flag is set when CRTV modulo 1024 equals 0.
Example: If RTPRES=32 then RTTINC2 flag rises once per second if the slow clock is 32.768 kHz. |
| 6 | MOD2048 | The RTTINC2 flag is set when CRTV modulo 2048 equals 0. |
| 7 | MOD4096 | The RTTINC2 flag is set when CRTV modulo 4096 equals 0. |