58.3 Recommended Operating Conditions
Power Input | Parameter | Conditions | Min | Max | Unit |
---|---|---|---|---|---|
VDDCORE | Core logic power supply (including CPU, memories and peripherals) | fCPU ≤ 420 MHz, fMCK ≤ 140 MHz fCPU ≤ 600 MHz, fMCK ≤ 200 MHz |
1.02 1.12 |
1.21 1.21 |
V |
VDDIOM | SDRAM I/O lines power supply | SDR-SDRAM | 3.00 | 3.60 | V |
LPDDR-SDRAM, LPSDR-SDRAM, DDR2-SDRAM | 1.70 | 1.90 | V | ||
VDDNF | NAND Flash I/O lines power supply | – | 1.70 | 3.60 | V |
VDDQSPI | VDDQSPI I/O lines power supply | – | 1.70 | 3.60 | V |
VDDANA(1) | VDDANA I/O lines, A/D converter, OTP memory power supply | – | 3.00 | 3.60 | V |
VDDIN33(1) | 2.5V regulator power input, USB interface I/O lines power supply | – | 3.00 | 3.60 | V |
VDDIOP0 | VDDIOP0 I/O lines power supply | – | 1.70 | 3.60 | V |
VDDIOP1 | VDDIOP1 I/O lines power supply | – | 1.70 | 3.60 | V |
VDDBU | Backup domain power supply | – | 1.60 | 3.60 | V |
tR_VDD | Power supply slope at power-up | Applies to any of the power supply inputs listed above | 0.2 | 20 | mV/µs |
tF_VDD | Power supply slope at power-down | Applies to any of the power supply inputs listed above | -20 | -1 | mV/µs |
Note:
- VDDANA and VDDIN33 are powered from
one single power source so that:
V(VDDANA,VDDIN33) ≤ ±50mV.
Symbol | Parameter | Conditions | Min | Max | Unit |
---|---|---|---|---|---|
VIN | Input line voltage range on inputs(2)(3) | – | -0.3V | VDD + 0.3V | V |
IIN | DC current injection on inputs(4) | – | – | ±0.2 | mA |
ITOT_INJ | Total current injection per power rail or per ground rail(5) | – | – | ±2 | mA |
Note:
- In this table, VDD refers to the voltage of the associated power rail of the I/O line, as defined in the Pin Description table. For example, for PA2, VDD refers to VDDIOP0.
- Input voltages VIN ≤ 0V or VIN ≥ VDD lead to negative or positive current injection on inputs.
- For analog inputs [PB17:PB6], input voltages VIN ≥ min(VDDANA, VADVREFP) lead to saturated A/D conversion to 0xFFF.
- Current injection on A/D converter analog inputs [PB17:PB6] may degrade the analog performance of the corresponding channel or the analog performance of other analog channels.
- Corresponds to the sum of the positive currents into one power rail and respectively to the sum of the negative currents into one ground rail as defined in the Pin Description table.
Symbol | Parameter | Conditions | Min | Max | Unit | |
---|---|---|---|---|---|---|
TA | Ambient temperature range | – | -40 | 105 | °C | |
TJ | Junction temperature range | – | -40 | 125 | °C | |
RJA | Junction-to-ambient thermal resistance | BGA228 | – | 40 | °C/W | |
PD | Allowable power dissipation | BGA228 | TA = 70°C | – | 1.3 | W |
TA = 85°C | – | 1.0 | W | |||
TA = 105°C | – | 0.5 | W |
Symbol | Parameter | Conditions | Min | Max | Unit |
---|---|---|---|---|---|
fCPU_CLK | Processor clock (CPU_CLK) frequency | VDDCORE ≥ 1.12V | – | 600 | MHz |
VDDCORE ≥ 1.02V | – | 420 | MHz | ||
fMCK | Main system bus clock (MCK) frequency | VDDCORE ≥ 1.12V | – | 200 | MHz |
VDDCORE ≥ 1.02V | – | 140 | MHz |
Symbol | Parameter | Conditions | Min | Max | Unit |
---|---|---|---|---|---|
fSDRAM_CLK | SDRAM clock frequency | VDDCORE ≥ 1.12V | |||
16-bit SDR-SDRAM | – | 200 | MHz | ||
16-bit LPSDR-SDRAM | – | 166 | MHz | ||
16-bit DDR2-SDRAM | 125 | 200 | MHz | ||
16-bit LPDDR-SDRAM | – | 200 | MHz | ||
VDDCORE ≥ 1.12V | |||||
32-bit SDR-SDRAM | – | 180 | MHz | ||
32-bit LPSDR-SDRAM | – | 158 | MHz | ||
VDDCORE ≥ 1.02V | |||||
16-bit SDR-SDRAM | – | 140 | MHz | ||
16-bit LPSDR-SDRAM | – | 140 | MHz | ||
16-bit DDR2-SDRAM | 125 | 140 | MHz | ||
16-bit LPDDR-SDRAM | – | 140 | MHz |