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11.13.40 IPR9
Peripheral Interrupt
Priority Register 9| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| | DMA3AIP | DMA3ORIP | DMA3DCNTIP | DMA3SCNTIP | | | | CM1IP | |
| Access | R/W | R/W | R/W | R/W | | | | R/W | |
| Reset | 1 | 1 | 1 | 1 | | | | 1 | |
Bit 7 – DMA3AIP DMA3 Abort
Interrupt Priority
| Value | Description |
|---|
| 1 |
High
Priority |
| 0 |
Low
Priority |
Bit 6 – DMA3ORIP DMA3 Overrun
Interrupt Priority
| Value | Description |
|---|
| 1 |
High
Priority |
| 0 |
Low
Priority |
Bit 5 – DMA3DCNTIP DMA3 Destination
Count Interrupt Priority
| Value | Description |
|---|
| 1 |
High
Priority |
| 0 |
Low
Priority |
Bit 4 – DMA3SCNTIP DMA3 Source Count
Interrupt Priority
| Value | Description |
|---|
| 1 |
High
Priority |
| 0 |
Low
Priority |
Bit 0 – CM1IP CMP1 Interrupt
Priority
| Value | Description |
|---|
| 1 |
High
Priority |
| 0 |
Low
Priority |
