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11.13.42 IPR11
Peripheral Interrupt
Priority Register 11| Name: | IPR11 |
| Address: | 0x4A9 |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| | | | | VDDIO2RDYIP | VDDIO2LVDIP | SPI2IP | SPI2TXIP | SPI2RXIP | |
| Access | | | | R/W | R/W | R/W | R/W | R/W | |
| Reset | | | | 1 | 1 | 1 | 1 | 1 | |
Bit 4 – VDDIO2RDYIP VDDIO2 Ready Interrupt Priority
| Value | Description |
|---|
| 1 |
High Priority |
| 0 |
Low Priority |
Bit 3 – VDDIO2LVDIP VDDIO2 LVD Interrupt Priority
| Value | Description |
|---|
| 1 |
High Priority |
| 0 |
Low Priority |
Bit 2 – SPI2IP SPI2 Interrupt
Priority
| Value | Description |
|---|
| 1 |
High
Priority |
| 0 |
Low
Priority |
Bit 1 – SPI2TXIP SPI2 Transmit
Interrupt Priority
| Value | Description |
|---|
| 1 |
High
Priority |
| 0 |
Low
Priority |
Bit 0 – SPI2RXIP SPI2 Receive
Interrupt Priority
| Value | Description |
|---|
| 1 |
High
Priority |
| 0 |
Low
Priority |
