4.1.1 Destination And Access Operands

To specify the destination for byte-orientated file register instructions, you may use the operands from either style shown in the table below. The wreg destination indicates that the instruction result will be written to the W register and the file register destination indicates that the result will be written to the register specified by the instruction's file register operand. This operand is usually represented by ,d in the device data sheet.

Table 4-1. Destination Operand Styles
Style Wreg destination File register destination
XC8 ,w ,f
MPASM ,0 ,1
For example (ignoring bank selection and address masking for this example):
addwf   foo,w		;add wreg to foo, leaving the result in wreg
addwf   foo,f		;add wreg to foo, updating the content of foo
addwf   foo,0		;add wreg to foo, leaving the result in wreg
addwf   foo,1		;add wreg to foo, updating the content of foo

It is highly recommended that the destination operand is always specified with those instructions where it is needed. If the destination operand is omitted, the destination is assumed to be the file register.

To specify the RAM access bit for PIC18 devices, you may use operands from either style shown in the table below. Banked access indicates that the file register address specified in the instruction is just an offset into the currently selected bank. Unbanked access indicates that the file register address is an offset into the Access bank, or common memory.

Table 4-2. RAM Access Operand Styles
Style Banked access Unbanked access
XC8 ,b ,c or ,a
MPASM ,1 ,0

This operand is usually represented by ,a in the device data sheet.

Alternatively, an instruction operand can be preceded by the characters “c:” to indicate that the address resides in the Access bank. For example:

addwf   bar,f,c	     ;add wreg to bar in common memory
addwf   bar,f,a	     ;add wreg to bar in common memory
addwf   bar,1,0	     ;add wreg to bar in common memory
addwf   bar,f,b	     ;add wreg to bar in banked memory
addwf   bar,1,1	     ;add wreg to bar in banked memory
btfsc   c:bar,3            ;test bit three in the common memory symbol bar

It is recommended that you always specify the RAM access operand or the common memory prefix. If these are not present, the instruction address is absolute and the address is within the upper half of the access bank (which dictates that the address must not masked), the instruction will use the access bank RAM. In all other situations, the instruction will access banked memory.

If you use the XC8 style, the destination operand and the RAM access operand can be listed in any order for PIC18 instructions. For example, the following two instructions are identical:

addwf   foo,f,c
addwf   foo,c,f

Always be consistent in the use of operand style for each instruction, and preferably, that style should remain consistent through the program. For example, the instruction addwf bar,1,c (which uses the MPASM-style ,1 destination suffix and the XC8-style ,c unbanked access suffix together in the same instruction) is illegal.

For example, the following instructions show the W register being moved to first, an absolute location; and then to an address represented by an identifier. Bank selection and masking has been used in this example. The PIC18 opcodes for these instructions, assuming that the address assigned to foo is 0x516 and to bar is 0x55, are shown below.

6EE5  movwf 0FE5h             ;write to access bank location 0xFE5
6E55  movwf bar,c             ;write to access bank location 0x55
0105  BANKSEL(foo)            ;set up BSR to access foo
6F16  movwf BANKMASK(foo),b   ;write to foo (banked)
6F16  movwf BANKMASK(foo)     ;defaults to banked access

Notice that the first two instruction opcodes have the RAM access bit (bit 8 of the op-code) cleared, but that the bit is set in the last two instructions.

Note: The manual masking of addresses used as instruction operands (for example using the BANKMASK() or PAGEMASK() macros or ANDing the operand with a mask) is not necessary when using the -Wl,--fixupoverflow option and any of the ignore, warn, or lstwarn arguments.