4.3.8.4.3 Fast Interrupt Vectoring

The fast interrupt handler address can be stored through AIC_SVR. The value written into this register when INTSEL = 0 is returned when the processor reads AIC_FVR (FIQ Vector register). This offers a way to branch in one single instruction to the interrupt handler, as AIC_FVR is mapped at the absolute address 0xFFFF F104 and thus accessible from the Arm fast interrupt vector at address 0x0000 001C through the following instruction:

LDR PC,[PC,# -&F20]

When the processor executes this instruction, it loads the value read in AIC_FVR in its program counter, thus branching the execution on the fast interrupt handler. It also automatically performs the clear of the fast interrupt source if it is programmed in Edge-Triggered mode.