8.8.6.2.1 Channel Processing Overview

Figure 8-237. Channel Processing Overview

Each of the 4 channels is composed of three blocks:

  • A clock selector which selects one of the clocks provided by the clock generator described in the section "PWM Clock Generator".
  • An internal counter clocked by the output of the clock selector. This internal counter is incremented or decremented according to the channel configuration and comparators events. The size of the internal counter is 16 bits.
  • A comparator used to generate events according to the internal counter value. It also computes the PWMx output waveform according to the configuration.