6 Universal Timer (UTMR)

The UTMR is composed of two timer modules that can operate independently of each other or as one big timer. The size of the UTMR may vary by device—for instance, on the PIC18-Q71 family, there are two 16-bit modules, which can be chained together to make a single 32-bit module. This timer was designed to contain the functionalities of all legacy timers (TMR0, TMR1 and TMR2).

The UTMR supports synchronous, non-synchronous and asynchronous clock sources and allows for reading the current count without stopping the timer, even with non-synchronous sources. There are three configurable events to control the timer: Start, Reset and Stop.

Start events define what starts the timer. The Reset event defines what resets the count back to zero. And there is a stop event, defining what will completely stop the timer. You can always enable these events, trigger from an input signal or disable entirely, enabling features like monostable triggering, hardware limits, and one-shot operation.