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28.4 Register Summary
| Offset | Name | Bit Pos. | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|
| 0x00 | CTRLA | 7:0 | RUNSTDBY | OUTEN | INTMODE[1:0] | | HYSMODE[1:0] | ENABLE |
0x01 | Reserved | | | | | | | | | |
| 0x02 | MUXCTRLA | 7:0 | INVERT | | | MUXPOS[1:0] | | MUXNEG[1:0] |
0x03 ... 0x05 | Reserved | | | | | | | | | |
| 0x06 | INTCTRL | 7:0 | | | | | | | | CMP |
| 0x07 | STATUS | 7:0 | | | | STATE | | | | CMP |
