3.1.9.1 ATA851x System Service
The MCC allows ATA851x service configuration as mentioned below.
This section describes the ATA851x service configuration as mentioned below:
- PLIB Used: Select the SPI library from the drop-down menu.
- Chip Select Pin: Choose the desired Chip Select (CS) pin from the drop-down list.
- NRESET Pin: Select the NRESET pin using the drop-down menu.
- NPWRON1 Pin: Choose the NPWRON1 pin from the drop-down options.
Function Prototype | Input | Description |
---|---|---|
void SYS_ATA851X_PowerOn(void | None | This function powers ON/Resets ATA8510/15 transceiver using NRESET pin and NPWRON1 pin. Precondition: NRESET pin and NPWRON1 pin have to be configured. |
uint8_t
SYS_ATA851X_ReadFillLevelRxFifo(void) | None |
The SPI command “Read Fill Level RX FIFO” returns the fill level of the RX data FIFO. |
uint8_t
SYS_ATA851X_ReadFillLevelTxFifo(void) | None |
The SPI command “Read Fill Level TX FIFO” returns the fill level of the TX data FIFO. |
uint8_t
SYS_ATA851X_ReadFillLevelRssiFifo(void) | None |
The SPI command “Read Fill Level RSSI FIFO” returns the fill level of the support FIFO in RX direction. |
void SYS_ATA851X_GetEventBytes(uint8_t
*events) | events |
The SPI command “Get Event Bytes” returns the actual system, events, power and config bytes to the host. After the SPI command “Get Event Bytes”, the event bytes system, events and power are cleared. The event byte config is not cleared as it contains the configuration of the currently loaded service/channel configuration. |
void SYS_ATA851X_ReadRssiFifo(uint8_t *data,
uint8_t length) | data, length | The SPI command “Read RSSI FIFO” reads n data bytes from the SFIFO in the RX direction. The desired number of data bytes to be returned is given in the length parameter. The access direction switch of the FIFO is set automatically and restored to the origin at the end of the command. |
void SYS_ATA851X_ReadRxFifo(uint8_t *data,
uint8_t length) | data, length |
The SPI command “Read RX FIFO” reads n data bytes from the DFIFO in RX direction. The desired number of data bytes to be returned is given in the length parameter. The access direction switch of the FIFO is set automatically and restored to the origin at the end of the command. |
void SYS_ATA851X_WriteSramReg(uint16_t addr,
uint8_t *data, uint8_t length) | SRAM address, data, length |
The SPI command “Write SRAM / Register” writes n (n = length) consecutive data bytes to the SRAM or hardware registers. |
void SYS_ATA851X_ReadSramReg(uint16_t addr,
uint8_t *data, uint8_t length) | SRAM address, data, length |
The SPI command “Read SRAM / Register” reads n (n = length) consecutive data bytes from the SRAM or hardware registers, and sends them back to the host. |
void SYS_ATA851X_WriteEeprom(uint16_t addr,
uint8_t data) | EEPROM Address, data |
The SPI command “Write EEPROM” writes one data byte to the given EEPROM address. |
void SYS_ATA851X_WriteEepromBlock(uint16_t addr,
uint8_t *data, uint8_t len) | EEPROM Address, data array, length | The function writes n (n = len) consecutive data bytes to the given EEPROM address. It uses SPI command “Write EEPROM” and “Trigger EEPROM Secure Write”. |
uint8_t SYS_ATA851X_ReadEeprom(uint16_t
addr) | EEPROM Address | The SPI command “Read EEPROM” reads one data byte from the given EEPROM address. |
void SYS_ATA851X_WriteTxFifo(uint8_t *data,
uint8_t length) | Data, length |
The SPI command “Write TX FIFO” writes n (n = length) data bytes into the TX data FIFO. The number of data bytes is given in the length parameter. The access direction of the DFIFO is switched automatically and restored to the origin value at the end of the command. |
void SYS_ATA851X_WriteTxPreambleFifo(uint8_t
*data, uint8_t length) | Data, length |
The SPI command “Write TX Preamble FIFO” writes n (n = length) data bytes into the TX support FIFO. The number of data bytes is given in the length parameter. The access direction of the SFIFO is switched automatically and restored to the origin value at the end of the command. |
void SYS_ATA851X_SetSystemMode(uint8_t
system_mode_config, uint8_t service_channel_config) | System mode, service channel | The SPI command “Set System Mode” is used to switch the following modes: IDLEMode, TXMode, RXMode, PollingMode. The IDLEMode is the only mode that allows reading/writing from/to the SRAM and registers. |
void SYS_ATA851X_CalibrateAndCheck(uint8_t
tune_check_config, uint8_t service_channel_config) | Tune configuration, service channel |
The SPI command “Calibrate and Check” is used to trigger one of the following features: Antenna tuning, Temperature measurement, SRC calibration, FRC calibration,VCO tuning, Self check. |
void SYS_ATA851X_PatchSpi(uint8_t
parameter) | Patch SPI parameter |
The SPI command "Patch SPI" is used to extend the SPI command set by the customer as follows: Patch_Spi ( The Patch SPI extension has no return and the customer has to finish
with a jump to |
void
SYS_ATA851X_SystemResetROM(void) | None | The SPI command “System Reset ROM” jumps directly to
address 0x0000 . |
uint8_t
SYS_ATA851X_GetVersionROM(void) | None | The SPI command “Get Version ROM” returns the ROM version to the host. |
uint8_t SYS_ATA851X_GetVersionFlash(uint8_t
flash_version[], uint8_t *customer) | Flash Version, Customer specific version |
The SPI command “Get Version Flash” returns the following data bytes to the host: ROM version, Flash version high byte, Flash version low byte,Customer specific version. |
void
SYS_ATA851X_CustomerConfCmd(void) | None | The SPI command "Customer Configurable Command" is used to extend the SPI command set by the customer as follows: “Customer Configurable Command” calls the function that is stored in an address in the Flash or user ROM. |
void
SYS_ATA851X_SystemReset(void) | None | The SPI command “System Reset” resets the device. |
void
SYS_ATA851X_TriggerEepromSecureWrite(void) | None | The SPI command “Trigger EEPROM Secure Write” starts a write process from some SRAM data to EEPROM. |
void SYS_ATA851X_SetVoltageMonitor(uint8_t
reg_vmcsr) | Voltage monitor level | This SPI command “Set Voltage Monitor” configures the voltage monitor in ATA851x transceiver. The voltage monitor level in the data byte is written to the Voltage Monitor Control and Status Register (VMCSR) |
void
SYS_ATA851X_OffCommand(void) | None | This SPI command “OFF Command” sets the ATA851x transceiver to OFFMode. |
uint16_t
SYS_ATA851X_ReadTemperatureValue(void) | None |
The SPI command “Read Temperature Value” returns the temperature value of the latest measurement. |
void SYS_ATA851X_InitSramService(uint8_t
sram_service_nr, uint8_t eep_service_nr) | SRAM service number, EEP service number |
The SPI command “Init SRAM Service” initializes the service sramSerivce with the service eepService. The init process is done within the main loop and takes approximately 200 μs. |
void SYS_ATA851X_StartRssiMeas(uint8_t
service_channel_config) | Service channel | The SPI command “Start RSSI Measurement” starts the
RSSI measurement of the service/channel configuration parameter of
the transferred SYS_ATA851X_GetRssiValue )”. |
uint16_t
SYS_ATA851X_GetRssiValue(void) | None | The SPI command “Get RSSI Value” returns the current RSSI average and peak value. To trigger an RSSI measurement, the SPI command “Start RSSI Measurement” can be used. The signal power of the watched 50Ω antenna input can be calculated by formula in user guide. |
void SYS_ATA851X_ReadRxFifoByteInt(uint8_t
*data, uint8_t length) | Data, length |
The SPI command “Read RX FIFO Byte Interrupt” returns n bytes of the content of the DFIFO in the RX direction. The desired number of data bytes to be returned is given by the step parameter. The access direction switch of the FIFO is set automatically and restored to the origin at the end of the command. The SPI command “Read RX FIFO Byte Interrupt” can be used instead of the command “Read RX FIFO” to read the DFIFO content without using the SPI FIFO. The data bytes are read directly from the DFIFO. This can be helpful in timing critical situations where every single byte is fetched in a certain time slot. Due to the bypassing mechanism of the SPI FIFOs, this SPI command only works with data rates up to 250 Kbit/s. |
void SYS_ATA851X_ReadRssiFifoByteInt(uint8_t
*data, uint8_t length) | Data, length |
The SPI command “Read RSSI FIFO Byte Interrupt” returns n data bytes of the content of the SFIFO in the RX direction. The desired number of returned data bytes is given by the step parameter. The access direction switch of the FIFO is set automatically and restored to the origin at the end of the command. The SPI command “Read RSSI FIFO Byte Interrupt” can be used instead of the command “Read RSSI FIFO” to read the SFIFO content without using the SPI FIFO. The data bytes are read directly from the SFIFO. This can be helpful in timing critical situations where every single byte is fetched in a certain time slot. Due to the bypassing mechanism of the SPI FIFOs, this SPI command only works with data rates up to 250 Kbit/s. |