47.3.4 I/O Ports

Table 47-4. I/O Ports
Standard Operating Conditions (unless otherwise stated)
Param. No. Sym. Device Characteristics Min. Typ.† Max. Units Conditions
Input Low-Voltage
VIL I/O PORT:
D300
  • with TTL buffer
 — — 0.8 V 4.5V ≤ VDD ≤ 5.5V
D301 — — 0.15 VDD V 1.8V ≤ VDD < 4.5V
D302
  • with Schmitt Trigger buffer
 — — 0.2 VDD V 2.0V ≤ VDD ≤ 5.5V
D303
  • with I2C levels
 — — 0.3 VDD V 2.0V ≤ VDD ≤ 5.5V
D304
  • with SMBus 2.0
 — — 0.8 V 2.7V ≤ VDD ≤ 5.5V
D305
  • with SMBus 3.0
 — — 0.8 V
D306 MCLR — — 0.2 VDD V
High/Low-Voltage
VIH I/O PORT:
D320
  • with TTL buffer
 2.0 — — V 4.5V ≤ VDD ≤ 5.5V
D321 0.25 VDD + 0.8 — — V 1.8V ≤ VDD < 4.5V
D322
  • with Schmitt Trigger buffer
 0.8 VDD — — V 2.0V ≤ VDD ≤ 5.5V
D323
  • with I2C levels
 0.7 VDD — — V
D324
  • with SMBus 2.0
 2.1 — — V 2.7V ≤ VDD ≤ 5.5V
D325
  • with SMBus 3.0
 1.35 — — V 25°C
 ≤ TA ≤ +125°C


1.8V ≤ VDD ≤ 5.5V
1.45 — — V -40°C
 ≤ TA ≤ +25°C


1.8V ≤ VDD ≤ 5.5V
D326 MCLR 0.7 VDD — — V
Input Leakage Current(1)
D340 IIL I/O PORTS — ±5 ±125 nA VSS ≤ VPIN ≤ VDD,

Pin at high-impedance, 85°C
D341 — ±5 ±1000 nA VSS ≤ VPIN ≤ VDD,

Pin at high-impedance, 125°C
D342 MCLR(2) — ±50 ±200 nA VSS ≤ VPIN ≤ VDD,

Pin at high-impedance, 85°C
Weak Pull-up Current
D350 IPUR 80 140 200 μA VDD = 3.0V,

VPIN = VSS
Output Low-Voltage
D360 VOL I/O PORTS — — 0.6 V IOL = 10.0 mA,

VPIN = 3.0V
Output High-Voltage
D370 VOH I/O PORTS VDD - 0.7 — — V IOH = 6.0 mA,

VPIN = 3.0V
All I/O Pins
D380 CIO — 5 50 pF

† Data in “Typ” column is at 3.0V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested.

Note:
  1. Negative current is defined as current sourced by the pin.
  2. The leakage current on the MCLR pin is strongly dependent on the applied voltage level. The specified levels represent normal operating conditions. Higher leakage current may be measured at different input voltages.