47.4.1 External Clock/Oscillator Timing Requirements

Note: See the table below.

Table 47-7. External Clock Oscillator

Standard Operating Conditions (unless otherwise stated)
Param No.	Sym.	Characteristic	Min.	Typ. †	Max.	Units	Conditions
ECL Oscillator
OS1	FECL	Clock Frequency	—	—	1	MHz
OS2	TECL_DC	Clock Duty Cycle	40	—	60	%
ECM Oscillator
OS3	FECM	Clock Frequency	—	—	16	MHz
OS4	TECM_DC	Clock Duty Cycle	40	—	60	%
ECH Oscillator
OS5	FECH	Clock Frequency	—	—	64	MHz	VDD ≥ 2.7V
			—	—	32	MHz	VDD < 2.7V
OS6	TECH_DC	Clock Duty Cycle	40	—	60	%
LP Oscillator
OS7	FLP	Clock Frequency	—	—	100	kHz	(Note 4)
XT Oscillator
OS8	FXT	Clock Frequency	—	—	4	MHz	(Note 4)
HS Oscillator
OS9	FHS	Clock Frequency	—	—	20	MHz	VDD > 2.5V (Note 4)
Secondary Oscillator
OS10	FSEC	Clock Frequency	32.4	32.768	33.1	kHz	(Note 4)
System Oscillator
OS20	FOSC	System Clock Frequency	—	—	64	MHz	(Note 2, Note 3)
OS21	FCY	Instruction Frequency	—	FOSC/4	—	MHz
OS22	TCY	Instruction Period	62.5	1/FCY	—	ns
Note: Instruction cycle period (TCY) equals four times the input oscillator time base period. All specified values are based on characterization data for that particular oscillator type under standard operating conditions with the device executing code. Exceeding these specified limits may result in an unstable oscillator operation and/or higher than expected current consumption. All devices are tested to operate at “min” values with an external clock applied to OSC1 pin. When an external clock input is used, the “max” cycle time limit is “DC” (no clock) for all devices. The system clock frequency (FOSC) is selected by the “main clock switch controls” as described in the “Power Saving Operation Modes” section. The system clock frequency (FOSC) must meet the voltage requirements defined in the “Standard Operating Conditions” section. LP, XT and HS oscillator modes require an appropriate crystal or resonator to be connected to the device. For clocking the device with the external square wave, one of the EC mode selections must be used.