16.14.9 RxyI2C
I2C Pad Rxy Control Register
Important: Refer to the “Pin Allocation
Table” for details about I2C compatible pins.
Name: | RxyI2C |
Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
SLEW[1:0] | PU[1:0] | TH[1:0] | |||||||
Access | R/W | R/W | R/W | R/W | R/W | R/W | |||
Reset | 0 | 0 | 0 | 0 | 0 | 0 |
Bits 7:6 – SLEW[1:0] I2C Specific Slew Rate Limiting Control
Value | Description |
---|---|
11 | I2C fast-mode-plus (1 MHz) slew rate enabled. The SLRxy bit is ignored. |
10 | Reserved |
01 | I2C fast-mode (400 kHz) slew rate enabled. The SLRxy bit is ignored. |
00 | Standard GPIO Slew Rate; enabled/disabled via SLRxy bit |
Bits 5:4 – PU[1:0] I2C Pull-up Selection
Value | Description |
---|---|
11 | Reserved |
10 | 10x current of standard weak pull-up |
01 | 2x current of standard weak pull-up |
00 | Standard GPIO weak pull-up, enabled via WPUxy bit |
Bits 1:0 – TH[1:0] I2C Input Threshold Selection
Value | Description |
---|---|
11 | Reserved |
10 | SMBus 2.0 (2.1 V) input threshold |
01 | I2C-specific input thresholds |
00 | Standard GPIO Input pull-up, enabled via INLVLxy registers |