21.10.5 TxCLKCON

Timer Clock Source Selection Register

Name:	TxCLKCON
Address:	0x290


Bit	7	6	5	4	3	2	1	0
						CS[2:0]
Access						R/W	R/W	R/W
Reset						0	0	0

Bits 2:0 – CS[2:0] Timer Clock Source Selection

Table 21-3. Clock Source Selection
CS	Clock Source
`111`	Reserved
`110`	MFINTOSC (32 kHz)
`101`	MFINTOSC (500 kHz)
`100`	LFINTOSC
`011`	HFINTOSC
`010`	F_OSC
`001`	F_OSC/4
`000`	Pin selected by T2INPPS

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