35.17 Transmitting a Break
The UART module has the capability of sending either a fixed length Break period or a software-timed Break period. The fixed length Break consists of a Start bit, followed by 12 ‘0’ bits and a Stop bit. The software-timed Break is generated by setting and clearing the BRKOVR bit.
SENDB is disabled in the LIN and DMX modes because those modes generate the Break sequence automatically.
The SENDB bit is automatically reset by hardware after the Break Stop bit is complete.
The TXMTIF bit indicates when the transmit operation is Active or Idle, just as it does during normal transmission. The following figure illustrates the Break sequence.