35.20.2 UxCON1

UART Control Register 1
Note:
  1. This bit is read-only in LIN, DMX and DALI modes.
Name: UxCON1
Offset: 0x2AC,0x2BF,0x2D2,0x2E5,0x2F8

Bit 76543210 
 ON  WUERXBIMD BRKOVRSENDB 
Access R/WR/W/HCR/WR/WR/W/HC 
Reset 00000 

Bit 7 – ON Serial Port Enable

ValueDescription
1 Serial port enabled
0 Serial port disabled (held in Reset)

Bit 4 – WUE Wake-Up Enable

ValueDescription
1 Receiver is waiting for falling RX input edge which will set the UxIF bit. Cleared by hardware on wake-up event. Also requires the UxIE bit of PIEx to enable wake.
0 Receiver operates normally

Bit 3 – RXBIMD Receive Break Interrupt Mode Select

ValueDescription
1 Set RXBKIF immediately when RX in has been low for the minimum Break time
0 Set RXBKIF on rising RX input after RX in has been low for the minimum Break time

Bit 1 – BRKOVR Send Break Software Override

ValueDescription
1 TX output is forced to non-Idle state
0 TX output is driven by transmit shift register

Bit 0 – SENDB  Send Break Control(1)

ValueDescription
1 Output Break upon UxTXB write. Written byte follows Break. Bit is cleared by hardware.
0 Break transmission completed or disabled
This bit is read-only in LIN, DMX and DALI modes.