2.3 Event Driven SleepWalking Implementation

SleepWalking represents the most advanced power management strategy available on Microchip Cortex-M processor-based MCUs. This technique enables peripherals to operate autonomously during Standby mode, communicating with each other through the Event System (EVSYS) without CPU intervention. The CPU wakes only when a hardware-qualified condition occurs, such as an ADC window comparator detecting a threshold crossing. This changes the wake-up paradigm from ‘wake on every event’ to ‘wake only when action is required’.

The SleepWalking architecture leverages the following three key hardware features:

• Event System (EVSYS): A hardware routing matrix that connects peripheral event generators to peripheral event users, enabling direct peripheral-to-peripheral communication without CPU involvement.
• On-Demand Clocking: Clock sources and generators wake automatically when requested by a peripheral performing a SleepWalking task, then return to their low-power state when the task completes.
• Peripheral Autonomy: Peripherals, such as the ADC, timers, and DMA controller can perform complex operations, including data acquisition, transfers, and threshold comparisons, all independently of the CPU.

By keeping the CPU in Standby while peripherals handle routine sensing and data movement, SleepWalking achieves the lowest average power consumption. The CPU wakes only when meaningful processing is required, eliminating the unnecessary wake-up cycles that limit battery life in conventional designs.