1 SleepWalking Overview

SleepWalking is a power management feature that enables certain peripherals to function autonomously through an on-demand clocking architecture while the CPU remains in Standby mode. While the system is in Standby mode, individual peripherals can independently request their required clocks from the Generic Clock Controller (GCLK), which in turn wakes the necessary clock source to perform specific tasks. Once the peripheral operation is complete, the clock is automatically disabled, and the system maintains its low-power state without CPU intervention.

In standard MCU operation, the CPU must periodically wake from a low-power state and is typically triggered by an internal timer or external interrupt to perform tasks or evaluate conditions before returning to sleep. SleepWalking optimizes this by delegating condition evaluation to the hardware layer. This autonomous operation is managed by the Event System (EVSYS), enabling peripherals to interact directly through hardware triggers. For example, a peripheral like the Real-Time Counter (RTC) can be used to periodically trigger an Analog-to-Digital Converter (ADC) conversion. The ADC then evaluates the result against a predefined threshold and generates an interrupt to wake the CPU if an action-worthy event occurs. This eliminates the need for the CPU to wake periodically for status polling.

During SleepWalking operation, all power domains, including the RAM power domain, remain active. The voltage regulator selection during SleepWalking depends on the clock sources requested by the peripheral. Refer to the Regulator Selection During SleepWalking section for additional information.