Figure 49-99. Input Offset Voltage at 25°C over VCM and
VDD
Figure 49-100. Input Offset Voltage
at 25°C over VCM and VDD (CPON =
1)
Figure 49-101. Input Offset Voltage at 3V over VCM and
Temperature
Figure 49-102. Input Offset Voltage at 5V over VCM and
Temperature
Figure 49-103. PSRR at 3V VDD and VCM = VDD/2 over
Frequency and Temperature
Figure 49-104. PSRR at DC and VCM = VDD/2 over VDD
and Temperature
Figure 49-105. Open Loop Gain and Phase Bode Plot at 3V and 25°C
Figure 49-106. Open Loop Gain at 25°C over VDD and VCM
Figure 49-107. Open Loop Gain at VCM = VDD/2 over
VDD and Temperature
Figure 49-108. Slew Rate Fall Time over VDD and Temperature
Figure 49-109. Slew Rate Rise Time over VDD and Temperature
Figure 49-110. VOH at 3V over Temperature and Load Current
Figure 49-111. VOH at 5V over Temperature and Load Current
Figure 49-112. VOL at 3V over Temperature and Load Current
Figure 49-113. VOL at 5V over Temperature and Load Current
Figure 49-114. Output Short Circuit Current Over VDD and
Temperature
Figure 49-115. IDD over
VDD and Temperature (CPON = 1)
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