19.14.5 WPUx

Weak Pull-Up Register

Important:

The weak pull-up device is automatically disabled if the pin is configured as an output, but this register remains unchanged
If MCLRE = 1, the weak pull-up on MCLR pin is always enabled and the corresponding WPU bit is not affected
Refer to the “Pin Allocation Table” for details about pin availability per port
Unimplemented bits will read back as ‘0’

Name:

WPUx


Bit	7	6	5	4	3	2	1	0
	WPUx7	WPUx6	WPUx5	WPUx4	WPUx3	WPUx2	WPUx1	WPUx0
Access	R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset	0	0	0	0	0	0	0	0

Bits 0, 1, 2, 3, 4, 5, 6, 7 – WPUxn Weak Pull-up PORTx Control

Value	Description
`1`	Weak pull-up enabled
`0`	Weak pull-up disabled

The weak pull-up device is automatically disabled if the pin is configured as an output, but this register remains unchanged If MCLRE = 1, the weak pull-up on MCLR pin is always enabled and the corresponding WPU bit is not affected Refer to the “Pin Allocation Table” for details about pin availability per port Unimplemented bits will read back as ‘0’