1.6.2 PFM Back to Back Writes

When repetitive writes to non‐volatile memory (Program Flash Memory) are performed, it could result in write/erase failures at some locations. The issue is due to latent timing in the non‐volatile memory controller which can cause the write instruction to fail under certain conditions.

Work around

To avoid the issue, the customer needs to wait an additional 100us after the NVMCON1.WR bit has been set, allowing for the last word to be loaded into the latch. This delay is added only when the NVMCON1.LWLO bit is cleared in the software.

if(i == (WRITE_FLASH_BLOCKSIZE-1))
        {
            // Start Flash program memory write
            NVMCON1bits.LWLO = 0;
        }
         NVMCON2 = 0x55;
        NVMCON2 = 0xAA;
        NVMCON1bits.WR = 1;
         if (NVMCON1bits.LWLO==0)
        {
        __delay_us(100);
        }
        NOP();
        NOP();
 
    writeAddr++;
    }

Note: The __delay_us() function uses a #define macro definition. For the intrinsic __delay_us() function to work correctly, the value of the _XTAL_FREQ must be clearly defined. This macro is defined in the device_config.h file if the code is generated using MCC. The value of XTAL_FREQ is equal to the system clock frequency.

Affected Silicon Revisions