5.1 Encoding
SPI Cmd Sequence without FEC | Comment |
---|---|
Write TX FIFO (3, 0x01, 0x02, 0x03) | Write data to be sent (0x01, 0x02, 0x03) to FIFO |
— | — |
Set System mode (0x21, 0x40, 0x00) | Send data |
SPI Cmd Sequence with FEC | Comment |
---|---|
Write SRAM/Register (3, 0x04, 0x02, 0x01, 0x02, 0x03) | Write data to be sent (0x01, 0x02, 0x03) to FECTXDB buffer |
Write SRAM/Register (1, 0x04, 0x00, 0x0E) | Start encryption (FECCR.SE) of 3 (FECCR.CNTE) bytes |
Set System mode (0x21, 0x40, 0x00) | Send data |