Reading the AT25010B/AT25020B/AT25040B via the SO pin requires the
following sequence. After the CS line is pulled low to select a
device, the READ (03h) instruction (including A8 for the AT25040B) is transmitted via the SI line followed by the 8‑bit address to be read (A7 -
A0). Refer to Table 7-1 for the
address bits for AT25010B/AT25020B/AT25040B.
Upon completion of the 8‑bit address, any data on the
SI line will be ignored. The data (D7‑D0) at the specified address
are then shifted out onto the SO line. If only one byte is to be read, the
CS line should be driven high after the data come out. The
read sequence can be continued since the byte address is automatically incremented and
data will continue to be shifted out. When the highest‑order address bit is reached, the
address counter will roll over to the lowest‑order address bit, allowing the entire
memory to be read in one continuous read cycle regardless of the starting address.Figure 7-1. Read Waveform
Note:
“A” represents the MSb
address bit (A8) for the AT25040B and
a “don’t care” bit for the AT25020B and AT25010B.
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