6 Device Commands and Addressing

The AT25010B/AT25020B/AT25040B is designed to interface directly with the synchronous Serial Peripheral Interface (SPI). The AT25010B/AT25020B/AT25040B utilizes an 8‑bit instruction register. The list of instructions and their operation codes are contained in Table 6-1. All instructions, addresses and data are transferred with the MSb first and start with a high‑to‑low CS transition.

Table 6-1. Instruction Set for the AT25010B/AT25020B/AT25040B
Instruction Name	Instruction Format	Operates On	Operation Description
`WREN`	`0000 X110`	STATUS Register	Set Write Enable Latch (WEL)
`WRDI`	`0000 X100`	STATUS Register	Reset Write Enable Latch (WEL)
`RDSR`	`0000 X101`	STATUS Register	Read STATUS Register
`WRSR`	`0000 X001`	STATUS Register	Write STATUS Register
`READ`	`0000 A011`	Memory Array	Read from Memory Array
`WRITE`	`0000 A010`	Memory Array	Write to Memory Array

Note:

“A” represents the MSb address bit (A₈) for the AT25040B and a “don't care” bit for the AT25020B and AT25010B.