Signal integrity issues on CA or DQS lines. When the Read Gate training fails, a dialog box
appears as shown in the following figure.Figure 5-5. Read Gate Training
Fail
Workaround
Configure any one of the following parameters to a different value using the MSS Configurator when the Read Gate training fails:
Memory Output Drive
Strength
FPGA DQS ODT
The following figure shows the configuration of output drive strength in
the DDR Memory Initialization tab.Figure 5-6. Configuring Output
Drive Strength—DDR Memory Initialization TabThe following figure shows the configuration of DQS ODT in the
DDR Controller tab.Figure 5-7. Configuring DQS
ODT—DDR Controller Tab