22.11.7 SFIOR – Special Function IO Register
When using the I/O specific commands IN and OUT, the I/O addresses 0x00 - 0x3F must be used. When addressing I/O Registers as data space using LD and ST instructions, 0x20 must be added to these offset addresses.
| Name: | SFIOR |
| Offset: | 0x30 |
| Reset: | 0 |
| Property: | When addressing I/O Registers as data space the offset address is 0x50 |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| PSR2 | |||||||||
| Access | R/W | ||||||||
| Reset | 0 |
Bit 1 – PSR2 Prescaler Reset Timer/Counter2
When this bit is written to one, the Timer/Counter2 prescaler will be reset. The bit will be cleared by hardware after the operation is performed. Writing a zero to this bit will have no effect. This bit will always be read as zero if Timer/Counter2 is clocked by the internal CPU clock. If this bit is written when Timer/Counter2 is operating in Asynchronous mode, the bit will remain one until the prescaler has been reset.