2.2.4 TrustZone Security Management

The device architecture embeds several mechanisms for system TrustZone configuration:

  • Core security extensions,
  • TrustZone Peripheral Manager (TZPM) for peripheral configuration,
  • TrustZone registers in the AHB matrix (MATRIX) for host configuration and memory configuration (except for DDR),
  • TrustZone Address Space Controller (TZC) based on Arm TZC-400 modules for DDR access configuration,
  • TrustZone AESB Address Space Controller (TZAESBASC) for on-the-fly encrypted memory zone access,
Important: The above TrustZone management mechanisms use separate configuration interfaces. Some memories or IPs may be configured by many of those mechanisms. In such case, consistency must be ensured between configurations.
Table 2-12.  Security Management
Security Location
CA7HostSupervisor mode or CP15
OTPCHostAS
XDMAC0HostXDMAC0
XDMAC1HostXDMAC1
XDMAC2HostXDMAC2
GMAC0HostTZPM
GMAC1HostTZPM
SDMMC0HostTZPM
SDMMC1HostTZPM
SDMMC2HostTZPM
MCAN0HostTZPM
MCAN1HostTZPM
MCAN2HostTZPM
MCAN3HostTZPM
MCAN4HostTZPM
ICMHostTZPM
UDPHSA_DMAHostTZPM
UDPHSB_DMAHostTZPM
OHCI_DMAHostTZPM
EHCI_DMAHostTZPM
TZAESBHostTZAESBASC
GPU2DCHostTZPM
LCDCHostTZPM
UDDRC_P0ClientTZC
UDDRC_P1ClientTZC
UDDRC_P2ClientTZC
UDDRC_P3ClientTZC
UDDRC_P4ClientTZC
OTPCClientAS
CPKCCClientAS
APB1ClientTZPM
APB2ClientTZPM
APB3ClientTZPM
APB4ClientTZPM
APB[10:7], APB5ClientAS
APB6ClientTZPM
QSPI0ClientMATRIX
QSPI1ClientMATRIX
TZAESBClientTZAESBASC - TZPM
SRAM_P0ClientMATRIX
SRAM_P1ClientMATRIX
EBIClientMATRIX
NFC_CMDClientMATRIX
NFC_RAMClientMATRIX
OHCI_EHCI_REGSClientMATRIX
USB_RAMClientMATRIX