9.9.7.15 TC Channel Status Register
Note: The flags in this register are a copy of the similar flags in the TC_SRx register.
Reading the TC_CSRx does not perform a clear-on-read of TC_SRx flags.
Name: | TC_CSRx |
Offset: | 0x34 + x*0x40 [x=0..2] |
Reset: | 0x00000000 |
Property: | Read-only |
Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
Access | |||||||||
Reset |
Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
MTIOB | MTIOA | CLKSTA | |||||||
Access | R | R | R | ||||||
Reset | 0 | 0 | 0 |
Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
Access | |||||||||
Reset |
Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
Access | |||||||||
Reset |
Bit 18 – MTIOB TIOBx Mirror
Value | Description |
---|---|
0 | TIOBx is low. If TC_CMRx.WAVE = 0, TIOBx is low. If TC_CMRx.WAVE = 1, TIOBx is driven low. |
1 | TIOBx is high. If TC_CMRx.WAVE = 0, TIOBx is high. If TC_CMRx.WAVE = 1, TIOBx is driven high. |
Bit 17 – MTIOA TIOAx Mirror
Value | Description |
---|---|
0 | TIOAx is low. If TC_CMRx.WAVE = 0, TIOAx is low. If TC_CMRx.WAVE = 1, TIOAx is driven low. |
1 | TIOAx is high. If TC_CMRx.WAVE = 0, TIOAx is high. If TC_CMRx.WAVE = 1, TIOAx is driven high. |
Bit 16 – CLKSTA Clock Enabling Status
Value | Description |
---|---|
0 | Clock is disabled. |
1 | Clock is enabled. |