10.3.5.5 Endpoint Configuration

The endpoint 0 is always a control endpoint, it must be programmed and active in order to be enabled when the End Of Reset interrupt occurs.

To configure the endpoints:

  • Fill the configuration register (UDPHS_EPTCFG) with the endpoint size, direction (IN or OUT), type (CTRL, Bulk, IT, ISO) and the number of banks.
  • Fill the number of transactions (NB_TRANS) for isochronous endpoints.
Note: For control endpoints the direction has no effect.
  • Verify that the EPT_MAPD flag is set. This flag is set if the endpoint size and the number of banks are correct for this endpoint.
  • Configure the endpoint control flags and enable them in UDPHS_EPTCTLENBx as described in UDPHS_EPTCTLDISx.

Control endpoints can generate interrupts and use only 1 bank.

All endpoints (except endpoint 0) can be configured either as Bulk, Interrupt or Isochronous. See the table USB Transfer Events.

The maximum packet size they can accept corresponds to the maximum endpoint size.

Note: The endpoint size of 1024 is reserved for isochronous endpoints.

The application has access to the physical block of DPR reserved for the endpoint through a 64-Kbyte logical address space.

The physical block of DPR reserved for the endpoint is remapped all along the 64-Kbyte logical address space. The application can write a 64-Kbyte buffer linearly.

Figure 10-11. Logical Address Space for DPR Access

Configuration examples of UDPHS_EPTCTLDISx for Bulk IN endpoint type follow below.

  • With DMA
    • AUTO_VALID: Automatically validate the packet and switch to the next bank.
    • EPT_ENABL: Enable endpoint.
  • Without DMA:
    • TXRDY: An interrupt is generated after each transmission.
    • EPT_ENABL: Enable endpoint.

Configuration examples of Bulk OUT endpoint type follow below.

  • With DMA
    • AUTO_VALID: Automatically validate the packet and switch to the next bank.
    • EPT_ENABL: Enable endpoint.
  • Without DMA
    • RXRDY_TXKL: An interrupt is sent after a new packet has been stored in the endpoint FIFO.
    • EPT_ENABL: Enable endpoint.