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Up to 1-GHz Arm® Cortex®-A7, MIPI/LVDS Display, Dual Gigabit Ethernet, Audio and Security
Up to 1-GHz Arm® Cortex®-A7, MIPI/LVDS Display, Dual Gigabit Ethernet, Audio and Security
Product Pages
SAMA7D65
  1. Home
  2. 8 Security and Cryptography Subsystem
  3. 8.13 Physical Unclonable Functions (PUF)
  4. 8.13.5 Functional Description
  5. 8.13.5.5 PUF Controller Operations
  6. 8.13.5.5.11 Generate Random Operation

  • Introduction
  • Reference Document
  • 1 Overview
  • 2 CPU and Interconnect
  • 3 Memories
  • 4 System Controller
  • 5 Analog Subsystem
  • 6 Image Subsystem
  • 7 Audio Subsystem
  • 8 Security and Cryptography Subsystem
    • 8.1 Overview
    • 8.2 TrustZone Advanced Encryption Standard Bridge (TZAESB)
    • 8.3 TrustZone AES Bridge Address Space Controller (TZAESBASC)
    • 8.4 TrustZone Address Space Controller (TZC)
    • 8.5 TrustZone Peripheral Manager (TZPM)
    • 8.6 Advanced Encryption Standard (AES)
    • 8.7 Secure Hash Algorithm (SHA)
    • 8.8 Triple Data Encryption Standard (TDES)
    • 8.9 Random Number Generator (TRNG)
    • 8.10 Integrity Check Monitor (ICM)
    • 8.11 Classical Public Key Cryptography Controller (CPKCC)
    • 8.12 Security Module (SECUMOD)
    • 8.13 Physical Unclonable Functions (PUF)
      • 8.13.1 Description
      • 8.13.2 Embedded Characteristics
      • 8.13.3 Block Diagram
      • 8.13.4 Product Dependencies
      • 8.13.5 Functional Description
        • 8.13.5.1 PUF Introduction
        • 8.13.5.2 PUF Operations
        • 8.13.5.3 Security Strength Versus Key Length
        • 8.13.5.4 PUF Controller States
        • 8.13.5.5 PUF Controller Operations
          • 8.13.5.5.1 Introduction
          • 8.13.5.5.2 Initialization Operation
          • 8.13.5.5.3 Enroll Operation
          • 8.13.5.5.4 Start Operation
          • 8.13.5.5.5 Reconstruct Operation
          • 8.13.5.5.6 Stop Operation
          • 8.13.5.5.7 Get Key Operation
          • 8.13.5.5.8 Wrap Generated Random Operation
          • 8.13.5.5.9 Wrap Operation
          • 8.13.5.5.10 Unwrap Operation
          • 8.13.5.5.11 Generate Random Operation
          • 8.13.5.5.12 Reseed Operation
          • 8.13.5.5.13 Test Memory Operation
          • 8.13.5.5.14 Test PUF Operation
          • 8.13.5.5.15 Zeroize Operation
        • 8.13.5.6 PUF Data Formats
        • 8.13.5.7 PUF Operation Restrictions
        • 8.13.5.8 PUF Error Handling
        • 8.13.5.9 PUF Diagnostics
        • 8.13.5.10 PUF Built-in Tests
        • 8.13.5.11 PUF Deterministic Random Number Generator (DRNG)
        • 8.13.5.12 Private Key Bus Transfer
        • 8.13.5.13 Register Write Protection
        • 8.13.5.14 Incorrect Access Report
      • 8.13.6 Register Summary
  • 9 Connectivity Subsystem
  • 10 USB Subsystem
  • 11 Electrical and Mechanical Characteristics
  • 12 Glossary
  • 13 Revision History
  • Microchip Information

8.13.5.5.11 Generate Random Operation

The Generate Random operation outputs the requested amount of random data as specified in a provided context. The context is defined in Context Specification for Generate Random Operation.

The online versions of the documents are provided as a courtesy. Verify all content and data in the device’s PDF documentation found on the device product page.

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