11.1.10.1 Processor Power Consumption in Active Mode

The following table provides the processor power consumption in the following conditions:

f_{CPU_CLK} = from 400 MHz to 1000 MHz
f_MCK1 = 200 MHz
f_MCK2 = 133 MHz
f_MCK3 = 266 MHz
f_MCK4 = 400 MHz
f_MCK5 = 200 MHz
f_MCK6 = 200 MHz
f_{MCK7, MCK8, MCK9} = 100 MHz
L1 caches enabled
L2 cache enabled
The Cortex-A7 core executes a CoreMark benchmark from the (internal) SRAM
Code compiled with speed optimization
Peripheral clocks disabled
Current measured according to the following figure

Figure 11-49. Current Measurement on VDDCORE and VDDCPU

Table 11-73. Processor Current Consumption running a CoreMark Benchmark from SRAM on AMP1+AMP2
f_CPU (MHz)	VDDCORE (V)	VDDCPU (V)	Power (mW)	T_J (°C)
f_CPU (MHz)	VDDCORE (V)	VDDCPU (V)	Power (mW)	-40	25	50	70	85	105	125
400	1.05	1.05	P_VDDCORE	86	90	94	100	109	124	147
400	1.05	1.05	P_VDDCPU	60	64	68	76	84	99	120
600	1.05	1.05	P_VDDCORE	89	94	98	106	114	130	152
600	1.05	1.05	P_VDDCPU	85	90	95	102	111	126	147
800	1.05	1.15	P_VDDCORE	93	98	103	110	118	135	158
800	1.05	1.15	P_VDDCPU	136	145	152	163	174	196	225
1000	1.05	1.25	P_VDDCORE	92	97	102	110	119	136	160
1000	1.05	1.25	P_VDDCPU	201	215	226	241	258	287	327

The figure below plots the total power consumption of the device running a CoreMark benchmark versus Temperature. It is based on the following formula :

Power (mW) = P_VDDCPU + P_VDDCORE + P_VDDIN33 + P_VDDIODDR

with P_VDDCPU and P_VDDCORE as measured in the above table. P_VDDIN33 contribution is 40 mW, and P_VDDIODDR is 20 mW.

Figure 11-50. Typical Device Power Consumption when Running a CoreMark Benchmark