25.6 Peripheral Dependencies
| Peripheral Name | Base Address |
NVIC IRQ Index:Source |
MCLK AHB/APB Clock Enable Bus:Register:Bit |
GCLK Peripheral Channel Control Register |
PAC Peripheral Identifier PERID:Register:Bit |
DMA Trigger Index:Source |
Event System Type:Event: Register:Path | Power Domain |
|---|---|---|---|---|---|---|---|---|
| RTC | 0x45006000 |
12 : TAMPER 13 : OVF 14 : PER0/PER1/PER2/PER3/PER4/PER5/PER6/PER7 15 : CMP0/CMP1/CMP2/CMP3 |
APB: CLKMSK[0] MASK12 | --- |
12 STATUS0 PERID12 |
3 : TIMESTAMP |
Generators: PER0: CHANNEL[6] PER1: CHANNEL[7] PER2: CHANNEL[8] PER3: CHANNEL[9] PER4: CHANNEL[10] PER5: CHANNEL[11] PER6: CHANNEL[12] PER7: CHANNEL[13] CMP0: CHANNEL[14] CMP1: CHANNEL[15] CMP2: CHANNEL[16] CMP3: CHANNEL[17] TAMPER: CHANNEL[18] OVF: CHANNEL[19] PERD: CHANNEL[20] Users: TAMPER: USER[1],Async |
PD_CORE_BU |