1.3 Modules Description

An AVR microcontroller is comprised of several building blocks: AVR CPU, SRAM, Flash, EEPROM and several peripheral modules called module types. Throughout this document, all peripheral modules will be referred to as modules.

Newer AVR microcontroller families can have one or more instances of a given module type. All instances have the same features and functions. Some module types are a subset of others and inherit some of their features. The inherited features are fully compatible with the respective module type. For example, the subset module for a timer can have fewer compare and capture channels than a full timer module.

Figure 1-2. Modules Types, Instances, Registers and Bits

A module type can be the Universal Synchronous-Asynchronous Receiver Transmitter (USART), while the module instance is, e.g., USART0, where the 0 suffix indicates the instance is “USART number 0”. For simplicity, a module instance will be referred to as a module throughout this document, unless there is a need to differentiate.

Each module has a fixed base address in the I/O memory map, and all registers contained in the module have fixed offset addresses relative to the module base address. This way, each register will not only have an absolute address in the I/O memory space, but also a relative address defined by its offset. The register offset addresses are equal for all instances of a module type, simplifying the task of writing drivers that can be used for all modules of a specific type. The peripheral module address map can be found in the data sheet and shows the base address for each peripheral.

Each module has several registers that contain control or status bits. All modules of a given type contain the same set (or subset) of registers, and all these registers contain the same set (or subset) of control and status bits.

Table 1-1 presents the base address of some of the ATtiny804/1604 peripherals.

Table 1-1. Peripheral Module Address Map (section)(1)
Base AddressNameDescription
0x0000VPORTAVirtual Port A
0x0004VPORTBVirtual Port B
0x001CGPIOGeneral Purpose I/O registers
0x0030CPUCPU
0x0040RSTCTRLReset Controller
0x0050SLPCTRLSleep Controller
0x0060CLKCTRLClock Controller
.........

Every module has a dedicated section presenting the features that the module has, a functional description of the module, and the specific signals and guidelines on how to configure a certain mode of operation with all the terminology explained. At the end of a module section, there is a register description subsection that contains the scope of every register, the initial value, and if it is readable or writable. It also provides the position of every configurable/accessible bit of a register.

All the registers, their addresses offsets, and the bit names and positions are described in the Register Summary section for each module. The register summary for the ADC module is presented in Figure 1-3.

Figure 1-3. ADC Register Summary(1)