Features

  • AVR CPU:
    • Running at up to 20 MHz
    • Single-cycle I/O register access
    • Two-level interrupt controller
    • Two-cycle hardware multiplier
  • Program and Debug Interface Disable (PDID)
  • Supply Voltage Range: 1.62–5.5V
  • Memories:
    • 16 KB In-System Programmable (ISP) Flash memory with true read-while-write operation
    • 2 KB SRAM
    • 512B EEPROM
    • 64B of User Row in nonvolatile memory that can retain data during a chip erase and be programmed while the device is locked
    • 64B of Boot Row in nonvolatile memory, accessible only when running from the boot section
    • Write/erase endurance
      • Flash: 10,000 cycles
      • EEPROM: 100,000 cycles
    • Data retention: 40 years at 55°C
  • System:
    • Power-On Reset (POR) circuit
    • Brown-out Detector (BOD) with user-programmable levels
    • Voltage Level Monitor (VLM) with an interrupt at a programmable level above the BOD level
    • Clock options:
      • High-precision internal oscillator with a selectable frequency of up to 20 MHz (OSCHF)
        • Auto-tuning for improved internal oscillator accuracy
      • Internal ultra-low power 32.768 kHz oscillator (OSC32K)
      • External 32.768 kHz crystal oscillator (XOSC32K)
      • External clock input
    • Single-pin Unified Program and Debug Interface (UPDI)
    • Three sleep modes:
      • Idle mode, with all peripherals running for immediate wake-up
      • Standby mode, with configurable operation of the selected peripherals
      • Power-Down mode, with full data retention
  • Peripherals:
    • Two 16-bit Timer/Counters type B (TCB) with capture and signal measurement capabilities
    • One 16-bit Timer/Counter type E (TCE) with three compare channels for PWM and waveform generator
    • One 16-bit Real-Time Counter (RTC) that can run from an external crystal or an internal oscillator
    • One Universal Synchronous and Asynchronous Receiver and Transmitter (USART):
      • Fractional baud rate generator, auto-baud, start-of-frame detection, and collision detection
      • Supports RS-485, LIN Host/Client, RTS/CTS hardware handshaking, and SPI Host protocols
      • Protocol conversion for accelerated single-wire communication
    • One Host/Client Serial Peripheral Interface (SPI)
    • One Two-Wire Interface (TWI) with dual address match:
      • Independent host and client operation (Dual mode)
      • Inter-Integrated Circuit (I2C) compatible
      • Standard mode (Sm, 100 kHz)
      • Fast mode (Fm, 400 kHz)
      • Fast mode Plus (Fm+, 1 MHz)
    • 4-channel Event System for CPU-independent and predictable inter-peripheral signaling
    • Configurable Custom Logic (CCL) with up to four programmable Look-up Tables (LUTs)
    • One Analog Comparator (AC)
    • One 10-bit, 166 ksps, Analog-to-Digital Converter (ADC)
    • Peripheral Touch Controller (PTC) with Driven Shield+ and Boost Mode technologies for capacitive touch buttons, sliders, wheels and 2D surfaces
      • Supports up to 27 PTC pins for both self-capacitance and mutual-capacitance channels
      • Supports External Integration Capacitors for large sensors
      • Uses the 10-bit ADC peripheral for signal acquisition and conversion
    • Internal 0.512V, 1.024V, 2.048V, 2.500V, 4.096V voltage references, with an external reference option
    • Automated Cyclic Redundancy Check (CRC) Flash program memory scan
    • Watchdog Timer (WDT) with Window mode and a separate on-chip oscillator
    • External interrupts on all general purpose pins
  • I/O and Packages:
    • 12 to 28 programmable I/O pins
    • 14-pin SOIC and TSSOP
    • 20-pin SSOP and VQFN 3x3 with Wettable Flanks
    • 28-pin SSOP, SPDIP and VQFN 4x4 with Wettable Flanks
    • 32-pin TQFP 7x7 and VQFN 5x5 with Wettable Flanks
  • Temperature Ranges:
    • Industrial: -40°C to 85°C ambient
    • Extended: -40°C to 125°C ambient