6.3 UART Interface

The ATWINC15x0-MR210xB supports the Universal Asynchronous Receiver/Transmitter (UART) interface. This interface is intended for debugging purposes only. The two UART pins TXD/RXD are available on pin J14 and pin J19, respectively. The UART is compatible with the RS-232 standard.

The default configuration for accessing the UART interface of ATWINC15x0-MR210xB is mentioned below:
  • Baud rate: 460800
  • Data: 8-bit
  • Parity: None
  • Stop bit: 1 bit
  • Flow control: None

It also has RX and TX FIFOs, which ensure reliable high-speed reception and low software overhead transmission. FIFO size is 4 x 8 for both RX and TX direction. The UART also has status registers showing the number of received characters available in the FIFO and various error conditions, as well as the ability to generate interrupts based on these status bits.

An example of the UART receiving or transmitting a single packet is shown in the following figure. This example shows 7-bit data (0x45), odd parity and two stop bits.

Figure 6-3. Example of UART RX of TX Packet