4 Generate Two Variable-Frequency Signals in NCO Fixed Duty Cycle Waveform Generation

Enable Waveform Output 0 and Waveform Output 1.

The CTRLC register is double buffered. It is recommended to wait in a loop for bit CTRLCBUSY in the Status register to be cleared every time the CTRLC register is written. 
Create a function called TCF0_OutputsSet that returns void and takes an argument of type uint8_t.
void TCF0_OutputsSet(uint8_t value)     
    {      
        while((TCF0.STATUS & TCF_CTRLABUSY_bm) != 0){};
        TCF0.CTRLC = value;
    }

The AVR16EB32 board runs default with a system clock of 3.33 MHz. For the TCF to run at 20 MHz , the system-clock prescaler must be disabled.

Create a function take returns void and take an argument of type void.void CLOCK_Initialize(void)
{
    _PROTECTED_WRITE(CLKCTRL.MCLKCTRLB, 0x0);
}

The TCF provides a range of clock options to choose from. For this application, select the default option, which is the Peripheral Clock running at 20 MHz. The CTRLB register controls the clock selection.

Create a function that returns void and takes an argument of type TCF_CLKSEL_t.
void TCF0_ClockSet(TCF_CLKSEL_t config)
{
    TCF0.CTRLB |= config;    
}

Using Equation 2, the Increment can be calculated as follows:

$Increment=\frac{f_{FRQ}\left(Hz\right)\times 2^{SIZE\_CNT}\times N}{{TCF}_{clock}\left(Hz\right)}$

Using the desired values results in:

The result is hexadecimal, 0x00000011.

The above formula cand be translated into the formula:
#define TCF0_NCOFD_HZ_TO_INCREMENT(HZ, F_CLOCK, TCF0_PRESCALER)   (uint32_t)(((float)(HZ) * 33554432.0 * (TCF0_PRESCALER)) / ((float)(F_CLOCK)) + 0.5)

Before the timer starts, the CMP is written with the value of 11.

The CMP register is double buffered. It is recommended to wait in a loop for bit CMP0BUSY in the Status register to be cleared every time the CMP register is written.
Create a function that returns void and takes an argument of type uint32_t.
void TCF0_CompareSet(uint32_t value)
{
    while((TCF0.STATUS & TCF_CMP0BUSY_bm) != 0){};
    TCF0.CMP = value; 
}

The CNT register is double buffered. It is recommended to wait in a loop for bit CNTBUSY in the Status register to be cleared every time the CNT register is written.
Create a function that returns void and takes an argument of type uint32_t.
void TCF0_CounterSet(uint32_t value)
{
    while((TCF0.STATUS & TCF_CNTBUSY_bm) != 0){};   
    TCF0.CNT0 = (uint8_t)value;  
}

The CTRLA register is double buffered. It is recommended to wait in a loop for bit CTRLABUSY in the Status register to be cleared every time the CTRLA register is written.
Create a function that returns void and takes an argument of type void.
void TCF0_Start(void)
{
    while((TCF0.STATUS & TCF_CTRLABUSY_bm) != 0){};
    TCF0.CTRLA |=  TCF_ENABLE_bm;
}

Create a function that returns void and takes an argument of type void.
void TCF0_Stop(void)
{
    while((TCF0.STATUS & TCF_CTRLABUSY_bm) != 0){};
    TCF0.CTRLA &= ~TCF_ENABLE_bm;   
}

The TCF will be initialized with the following settings:

• Both outputs enabled
• Peripheral clock selected
• NCO Fixed Duty Cycle mode set
• Set a waveform generation pulse length of 1 clock cycle
• Set a frequency of 10 Hz
• Set the timer to start counting from 0

Create a function that returns void and takes an argument of type void.
void TCF0_Initialize(void)
{
   TCF0_OutputsSet(TCF_WO0EN_bm | TCF_WO1EN_bm);
   TCF0_ClockSet(TCF_CLKSEL_CLKPER_gc);
   TCF0_PrescalerSet(TCF_PRESC_DIV1_gc); 
   TCF0_ModeSet(TCF_WGMODE_NCOFDC_gc); 
   TCF0_CounterSet(0);
   TCF0_CompareSet(TCF0_NCOFD_HZ_TO_INCREMENT(10, 20000000, 1));
}

The util/delay.h header file requires to define the F_CPU frequency.
#define F_CPU 20000000UL
Include the util/delay.h header file
#include <util/delay.h>

Create a function that returns void and takes an argument of type uint_32t. Use the TCF0_CompareSet function to change the frequency. 
void NCO_Fixed_DutyCycle_Demo(void)
{       
    /* Configure the TCF to start counting from 0 */
    TCF0_CounterSet(0); 
    
    /* Enable the TCF */
    TCF0_Start();
    
    /* Delay for 600 ms */
   _delay_ms(600);
   
   /* Load the CMP register with a frequency of 100 Hz */
   TCF0_CompareSet(TCF0_NCOFD_HZ_TO_INCREMENT(100, 20000000, 1));
   
    /* Delay for 60 ms */
   _delay_ms(60);
   
   /* Load the CMP register with a frequency of 1 KHz */
   TCF0_CompareSet(TCF0_NCOFD_HZ_TO_INCREMENT(1000, 20000000, 1));
   
    /* Delay for 6 ms */
   _delay_ms(6);
   
   /* Load the CMP register with a frequency of 10 KHz */
   TCF0_CompareSet(TCF0_NCOFD_HZ_TO_INCREMENT(10000, 20000000, 1));
   
    /* Delay for 600 us */
   _delay_us(600);
   
   /* Load the CMP register with a frequency of 100 KHz */
   TCF0_CompareSet(TCF0_NCOFD_HZ_TO_INCREMENT(100000, 20000000, 1));
   
    /* Delay for 60 us */
   _delay_us(60);
   
    /* Stop the TCF */
   TCF0_Stop();
   
   /* Load the CMP register with a frequency of 10 Hz */
   TCF0_CompareSet(TCF0_NCOFD_HZ_TO_INCREMENT(10, 20000000, 1));
}

void main(void) 
{   
    CLOCK_Initialize();
    TCF0_Initialize();
    while(1)
    {
        NCO_Fixed_DutyCycle_Demo();
        _delay_ms(1000);
    }    
}