1.5.3 OSTS Bit Remains Clear
When using an external crystal in HS mode and the 4xPLL is enabled, once the Two-Speed Start-up sequence has expired, the OSTS bit remains clear incorrectly indicating that the microcontroller is operating from the internal oscillator. This issue only occurs when the 4xPLL is enabled; when the 4xPLL is disabled, the OSTS bit operates as expected.
Work around
Use the PLL ready flag (PLLR bit of the OSCSTAT register) to determine that the microcontroller is operating from the external crystal. The PLLR bit will only be set when the clock source used by the PLL is ready; therefore, the PLLR bit will indicate when both the external crystal and the PLL are ready.
Affected Silicon Revisions
A1 | A2 | A3 | |||||
X | X | X |