8.1.1 Protected Address Ranges Set by WPB1 and WPB0

The EEPROM array in the AT24CSW04X/AT24CSW08X will be protected from writing in accordance with the WPB1 and WPB0 bit values as long as the WPRE bit is set to logic ‘1’. If the WPRE bit is set to logic ‘0’, no portion of the EEPROM array will be protected. The combination of these three bits creates five possible levels of protection for the device. The protected address ranges of the memory are shown in Table 8-5.
Table 8-5. Word Address Byte Requirements for Accessing the Write Protection Register
Protection LevelWPREWPB1WPB0Protected Address RangeUnprotected Address Range
4-Kbit8-Kbit4-Kbit8-Kbit
None0XXNoneNone000h‑1FFh000h‑3FFh
Upper ¼100180h‑1FFh300h‑3FFh000h‑17Fh000h‑2FFh
Upper ½101100h‑1FFh200h‑3FFh000h‑0FFh000h‑1FFh
Upper ¾110080h‑1FFh100h‑3FFh000h‑07Fh000h‑0FFh
Full Array111000h‑1FFh000h‑3FFhNoneNone