5.1 Clock and Data Transition Requirements

The SDA pin is an open-drain terminal and therefore must be pulled high with an external pull‑up resistor. SCL is an input pin that can either be driven high or pulled high using an external pull‑up resistor. Data on the SDA pin may change only during SCL low time periods. Data changes during SCL high periods will indicate a Start or Stop condition as defined below. The relationship of the AC timing parameters with respect to SCL and SDA for the AT24CSW04X/AT24CSW08X are shown in the timing waveform in Figure 4-1. The AC timing characteristics and specifications are outlined in AC Characteristics.