3.5.1 Analog Input Offset Voltage (TA = -40°C to 85°C)

A clarification has been made for the “Analog Comparator Input Offset Voltage”.

Table 3-10. TA = -40°C to 85°C, VCC = 1.8V to 5.5V (unless otherwise noted)
SymbolParameterConditionMin.Typ.Max.Units
VILInput low voltage, except XTAL1 pin

VCC = 1.8-2.4V

VCC = 2.4-5.5V

-0.5

-0.5

0.2VCC(1)

0.3VCC(1)

V
VIL1Input low voltage, XTAL1 pinVCC = 1.8-5.5V-0.5 0.1VCC(1)
VIHInput high voltage, except XTAL1 and RESET pins

VCC = 1.8-2.4V

VCC = 2.4-5.5V

0.7VCC(2)

0.6VCC(2)

VCC + 0.5

VCC + 0.5

VIH1Input high voltage, XTAL1 pin

VCC = 1.8-2.4V

VCC = 2.4-5.5V

0.8VCC(2)

0.7VCC(2)

VCC + 0.5

VCC + 0.5

VIH2Input high voltage, RESET pinVCC = 1.8-5.5V 0.85VCC(2)VCC + 0.5
VOLOutput low voltage(3), Port A, C, D, E, F, G, H, J

IOL = 10 mA, VCC = 5V

IOL = 5 mA, VCC = 3V

0.9

0.6

VOL1Output low voltage(3), Port B

IOL = 20 mA, VCC = 5V

IOL = 10 mA, VCC = 3V

0.9

0.6

VOHOutput high voltage(4), Port A, C, D, E, F, G, H, J

IOH = -10 mA, VCC = 5V

IOH = -5 mA, VCC = 3V

4.2

2.3

VOH1Output high voltage(4), Port B

IOH = -20 mA, VCC = 5V

IOH = -10 mA, VCC = 3V

4.2

2.3

IILInput leakage current I/O PinVCC = 5.5V, pin low (absolute value)1µA
IIHInput leakage current I/O PinVCC = 5.5V, pin high (absolute value)1
RRSTReset pull-up resistor20100
RPUI/O Pin pull-up resistor20100
VACIOAnalog comparator input offset voltage

VCC = 5V

Vin = VCC/2

< 1040mV
VACIOAnalog comparator input offset voltage

VCC < 3.6V

Vin < 0.5V

<1560(5)mV
VACIOAnalog comparator input offset voltage

VCC > 3.6V

Vin < 0.5V

<15500(5)mV
IACLKAnalog comparator

VCC = 5V

Vin = VCC/2

-50 50nA
tACIDAnalog comparator propagation delay

VCC = 2.7V

VCC = 4.0V

750

500

ns
Note:
  1. “Max” means the highest value where the pin is ensured to be read as low.
  2. “Min” means the lowest value where the pin is ensured to be read as high.
  3. Although each I/O port can sink more than the test conditions (20 mA at VCC = 5V, 10 mA at VCC = 3V for Port B and 10 mA at VCC = 5V, 5 mA at VCC = 3V for all other ports) under steady-state conditions (non-transient), observe the following:
    • TQFP and QFN/MLF Package:
      1. For all ports, the sum of all IOL may not exceed 400 mA.
      2. For ports A0 - A7, C4 - C7, and G2, the sum of all IOL may not exceed 100 mA.
      3. For ports B0 - B7, E0 - E7, and G3 - G5, the sum of all IOL may not exceed 100 mA.
      4. For ports D0 - D7, C0 - C3, and G0 - G1, the sum of all IOL may not exceed 100 mA.
      5. For ports F0 - F7, the sum of all IOL may not exceed 100 mA.

      If IOL exceeds the test condition, VOL may exceed the related specification. Pins are not ensured to sink current higher than the listed test condition.

  4. Although each I/O port can source more than the test conditions (20 mA at VCC = 5V, 10 mA at VCC = 3V for Port B and 10 mA at VCC = 5V, 5 mA at VCC = 3V for all other ports) under steady-state conditions (non-transient), observe the following:
    • TQFP and QFN/MLF Package:
      1. For all ports, the sum of all IOH may not exceed 400 mA.
      2. For ports A0 - A7, C4 - C7, and G2, the sum of all IOH may not exceed 100 mA.
      3. For ports B0 - B7, E0 - E7, and G3 - G5, the sum of all IOH may not exceed 100 mA.
      4. For ports D0 - D7, C0 - C3, and G0 - G1, the sum of all IOH may not exceed 100 mA.
      5. For ports F0 - F7, the sum of all IOH may not exceed 100 mA.

      If IOH exceeds the test condition, VOH may exceed the related specification. Pins are not ensured to source current higher than the listed test condition

  5. These values are based on characterization. The maximum limit in production can, therefore, not be assured.