3.4.1 Interrupt Vectors in ATmega165A/PA/325A/PA/3250A/PA/645A/P/6450A/P
A clarification for the source names of the Interrupt Vectors has been made to comply with the header file naming convention.
Vector No | Program Address(2) | Source | Interrupts Definition |
---|---|---|---|
1 | 0x0000(1) | RESET | External pin, Power-on Reset, Brown-out Reset, Watchdog System Reset and JTAG AVR Reset |
2 | 0x0002 | INT0 | External Interrupt Request 0 |
3 | 0x0004 | PCINT0 | Pin Change Interrupt Request 0 |
4 | 0x0006 | PCINT1 | Pin Change Interrupt Request 1 |
5 | 0x0008 | TIMER2_COMP | Timer/Counter2 Compare Match |
6 | 0x000A | TIMER2_OVF | Timer/Counter2 Overflow |
7 | 0x000C | TIMER1_CAPT | Timer/Counter1 Capture Event |
8 | 0x000E | TIMER1_COMPA | Timer/Counter1 Compare Match A |
9 | 0x0010 | TIMER1_COMPB | Timer/Coutner1 Compare Match B |
10 | 0x0012 | TIMER1_OVF | Timer/Counter1 Overflow |
11 | 0x0014 | TIMER0_COMP | Timer/Counter0 Compare Match |
12 | 0x0016 | TIMER0_OVF | Timer/Counter0 Overflow |
13 | 0x0018 | SPI_STC | SPI Serial Transfer Complete |
14 | 0x001A | USART0_RX | USART Receive complete |
15 | 0x001C | USART0_UDRE | USART Data Register Empty |
16 | 0x001E | USART0_TX | USART Transmit complete |
17 | 0x0020 | USI_START | USI Start Condition |
18 | 0x0022 | USI_OVERFLOW | USI Overflow |
19 | 0x0024 | ANALOG_COMP | Analog Comparator |
20 | 0x0026 | ADC | ADC Conversion complete |
21 | 0x0028 | EE_READY | EEPROM Ready |
22 | 0x002A | SPM_READY | Store Program Memory Ready |
Note:
- When the BOOTRST fuse is programmed, the device will jump to the boot loader address at Reset. See “Boot Loader Support – Read-While-Write Self-Programming”.
- When setting the IVSEL bit in MCUCR, Interrupt Vectors will be moved to the start of the boot Flash section. The address of each Interrupt Vector will then be the address in this table added to the start address of the boot Flash section.
The table below shows Reset and Interrupt Vectors placement for the different BOOTRST and
IVSEL settings combinations. If the program never enables an interrupt source, the
Interrupt Vectors are not used, and regularly program code can be placed at these
locations. This is also the case if the Reset Vector is in the Application section while
the Interrupt Vectors are in the Boot section or vice versa.
BOOTRST(1) | IVSEL | Reset Address | Interrupt Vectors Start Address |
---|---|---|---|
1 | 0 | 0x000 | 0x002 |
1 | 1 | 0x000 | Boot Reset Address + 0x0002 |
0 | 0 | Boot Reset Address | 0x002 |
0 | 1 | Boot Reset Address | Boot Reset Address + 0x0002 |
Note: 1. For the BOOTRST Fuse, “
1
” means
unprogrammed, while “0
” means programmed.The most typical and general program setup for the Reset and Interrupt Vector Addresses
are:
Address Labels Code Comments
0x0000 jmp RESET ; Reset Handler
0x0002 jmp INT0 ; IRQ0 Handler
0x0004 jmp PCINT0 ; PCINT0 Handler
0x0006 jmp PCINT1 ; PCINT1 Handler
0x0008 jmp TIMER2_COMP ; Timer2 CompareA Handler
0x000A jmp TIMER2_OVF ; Timer2 Overflow Handler
0x000C jmp TIMER1_CAPT ; Timer1 Capture Handler
0x000E jmp TIMER1_COMPA ; Timer1 CompareA Handler
0x0010 jmp TIMER1_COMPB ; Timer1 CompareB Handler
0x0012 jmp TIMER1_OVF ; Timer1 Overflow Handler
0x0014 jmp TIMER0_COMP ; Timer0 Compare Handler
0x0016 jmp TIMER0_OVF ; Timer0 Overflow Handler
0x0018 jmp SPI_STC ; SPI Transfer Complete Handler
0x001A jmp USART0_RX ; USART RX Complete Handler
0x001C jmp USART0_UDRE ; USART UDR Empty Handler
0x0020 jmp USI_START ; USI Start Condition Handler
0x0022 jmp USI_UDREOVERFLOW ; USI Overflow Handler
0x0024 jmp ANALOG_COMP ; Analog Comparator Handler
0x0026 jmp ADC ; ADC Conversion Complete Handler
0x0028 jmp EE_READY ; EEPROM Ready Handler
0x002A jmp SPM_READY ; SPM Ready Handler
;
0x0034 RESET: ldi r16,high(RAMEND) ; Main program start
0x0035 out SPH,r16 ; Set Stack Pointer to top of RAM
0x0036 ldi r16,low(RAMEND)
0x0037 out SPL,r16
0x0038 sei ; Enable interrupts
0x0039 <instr> xxx
... ... ... ...
When the BOOTRST Fuse is unprogrammed, the Boot section size is set to 2 KB, and the
MCUCR.IVSEL is set before any interrupts are enabled, the most typical and general
program setup for the Reset and Interrupt Vector Addresses
are:
Address Labels Code Comments 0x0000 RESET: ldi r16,high(RAMEND) ; Main program start 0x0001 out SPH,r16 ; Set Stack Pointer to top of RAM 0x0002 ldi r16,low(RAMEND) 0x0003 out SPL,r16 0x0004 sei ; Enable interrupts 0x0005 <instr> xxx ; .org 0x1C02 0x1C02 jmp EXT_INT0 ; IRQ0 Handler 0x1C04 jmp EXT_INT1 ; IRQ1 Handler ... ... ... ; 0x1C32 jmp SPM_RDY ; SPM Ready Handler
When the BOOTRST Fuse is programmed and the Boot section size is set to 2 KB, the most
typical and general program setup for the Reset and Interrupt Vector Addresses
are:
Address Labels Code Comments .org 0x0002 0x0002 jmp EXT_INT0 ; IRQ0 Handler 0x0004 jmp EXT_INT1 ; IRQ1 Handler ... ... ... ; 0x0032 jmp SPM_RDY ; SPM Ready Handler ; .org 0x1C00 0x1C00 RESET: ldi r16,high(RAMEND) ; Main program start 0x1C01 out SPH,r16 ; Set Stack Pointer to top of RAM 0x1C02 ldi r16,low(RAMEND) 0x1C03 out SPL,r16 0x1C04 sei ; Enable interrupts 0x1C05 <instr> xxx
When the BOOTRST Fuse is programmed, the Boot section size is set to 2 KB, and the
MCUCR.IVSEL is set before any interrupts are enabled, the most typical and general
program setup for the Reset and Interrupt Vector Addresses
are:
Address Labels Code Comments ; .org 0x1C00 0x1C00 jmp RESET ; Reset handler 0x1C02 jmp EXT_INT0 ; IRQ0 Handler 0x1C04 jmp EXT_INT1 ; IRQ1 Handler ... ... ... ; 0x1C32 jmp SPM_RDY ; SPM Ready Handler ; 0x1C34 RESET: ldi r16,high(RAMEND) ; Main program start 0x1C35 out SPH,r16 ; Set Stack Pointer to top of RAM 0x1C36 ldi r16,low(RAMEND) 0x1C37 out SPL,r16 0x1C38 sei ; Enable interrupts 0x1C39 <instr> xxx
Vector No | Program Address(2) | Source | Interrupts definition |
---|---|---|---|
1 | 0x0000(1) | RESET | External pin, Power-on Reset, Brown-out Reset, Watchdog Reset and JTAG AVR Reset. |
2 | 0x0002 | INT0 | External Interrupt Request 0 |
3 | 0x0004 | PCINT0 | Pin Change Interrupt Request 0 |
4 | 0x0006 | PCINT1 | Pin Change Interrupt Request 1 |
5 | 0x0008 | TIMER2_COMP | Timer/Counter2 Compare Match |
6 | 0x000A | TIMER2_OVF | Timer/Counter2 Overflow |
7 | 0x000C | TIMER1_CAPT | Timer/Counter1 Capture Event |
8 | 0x000E | TIMER1_COMPA | Timer/Counter1 Compare Match A |
9 | 0x0010 | TIMER1_COMPB | Timer/Counter1 Compare Match B |
10 | 0x0012 | TIMER1_OVF | Timer/Counter1 Overflow |
11 | 0x0014 | TIMER0_COMP | Timer/Counter0 Compare Match |
12 | 0x0016 | TIMER0_OVF | Timer/Counter0 Overflow |
13 | 0x0018 | SPI_STC | SPI Serial Transfer Complete |
14 | 0x001A | USART0_RX | USART0 Receive complete |
15 | 0x001C | USART0_UDRE | USART Data Register Empty |
16 | 0x001E | USART0_TX | USART Transmit complete |
17 | 0x0020 | USI_START | USI Start condition |
18 | 0x0022 | USI_OVERFLOW | USI Overflow |
19 | 0x0024 | ANALOG_COMP | Analog Comparator |
20 | 0x0026 | ADC | ADC Conversion complete |
21 | 0x0028 | EE_READY | EEPROM Ready |
22 | 0x002A | SPM_READY | Store Program Memory Ready |
23 | 0x002C | NOT_USED | Reserved |
24 | 0x002E | PCINT2 | Pin Change Interrupt Request 2 |
25 | 0x0030 | PCINT3 | Pin Change Interrupt Request 3 |
Note:
- When the BOOTRST fuse is programmed, the device will jump to the boot loader address at Reset. See “Boot Loader Support – Read-While-Write Self-Programming”.
- When setting the IVSEL bit in MCUCR, Interrupt Vectors will be moved to the start of the boot Flash section. The address of each Interrupt Vector will then be the address in this table added to the start address of the boot Flash section.
The most typical and general program setup for the Reset and Interrupt Vector Addresses
is:
Address Labels Code Comments
0x0000 jmp RESET ; Reset Handler
0x0002 jmp INT0 ; IRQ0 Handler
0x0004 jmp PCINT0 ; PCINT0 Handler
0x0006 jmp PCINT1 ; PCINT1 Handler
0x0008 jmp TIMER2_COMP ; Timer2 CompareA Handler
0x000A jmp TIMER2_OVF ; Timer2 Overflow Handler
0x000C jmp TIMER1_CAPT ; Timer1 Capture Handler
0x000E jmp TIMER1_COMPA ; Timer1 CompareA Handler
0x0010 jmp TIMER1_COMPB ; Timer1 CompareB Handler
0x0012 jmp TIMER1_OVF ; Timer1 Overflow Handler
0x0014 jmp TIMER0_COMP ; Timer0 Compare Handler
0x0016 jmp TIMER0_OVF ; Timer0 Overflow Handler
0x0018 jmp SPI_STC ; SPI Transfer Complete Handler
0x001A jmp USART0_RX ; USART RX Complete Handler
0x001C jmp USART0_UDRE ; USART UDR Empty Handler
0x0020 jmp USI_START ; USI Start Condition Handler
0x0022 jmp USI_UDREOVERFLOW ; USI Overflow Handler
0x0024 jmp ANALOG_COMP ; Analog Comparator Handler
0x0026 jmp ADC ; ADC Conversion Complete Handler
0x0028 jmp EE_READY ; EEPROM Ready Handler
0x002A jmp SPM_READY ; SPM Ready Handler
0x002C jmp NOT_USED ; Reserved Handler
0x002E jmp PCINT2 ; PCINT2 Handler Handler
0x0030 jmp PCINT3 ; PCINT3 Handler Handler
;
0x0034 RESET: ldi r16,high(RAMEND) ; Main program start
0x0035 out SPH,r16 ; Set Stack Pointer to top of RAM
0x0036 ldi r16,low(RAMEND)
0x0037 out SPL,r16
0x0038 sei ; Enable interrupts
0x0039 <instr> xxx
... ... ... ...