46.2 Operation

The APB clock is only used for the APB interface logic and is enabled automatically for register reads and writes. An internal ring oscillator generates the clock for all other logic which is enabled automatically as needed to process tamper events. Other than during register accesses and tamper events, AT module clocks are quiescent.

The AT module has a single interrupt request.

The CTRLA.PRIV bit controls access to AT registers. When CTRLA.PRIV = 1, only privileged accesses are permitted to AT registers, unprivileged accesses generate a bus error. When CTRLA.PRIV = 0 both privileged and unprivileged accesses are permitted.