3.1.3.1 Register Indirect Addressing and the Instruction Set
The addressing modes presented in Table 4-2 demonstrate the Indirect Addressing mode capability of the PIC32A devices. Due to operation encoding and functional
considerations, not every instruction which supports Indirect Addressing supports all modes
shown in Table 4-2. The majority of instructions which use Indirect Addressing support the
No Modify, Pre-Increment, Pre-Decrement, Post-Increment and Post-Decrement Addressing
modes. The MOV instructions and several accumulator-based DSP instructions
are also capable of using the Register Offset Addressing mode.
Wd and Ws in the
summary tables of Instruction Set Overview.