Do not generate any waveform from the
TCE In Pattern Generation mode, so the Pattern Generation Mode bit field in the
CTRLA register must be configured
accordingly.
WEX0.CTRLA = WEX_PGM_bm;
Every signal output must be enabled
to be overridden in Pattern Generation mode. Every signal has a one-to-one
relationship with the bits from PGMOVR
register.
The PGMOUT register holds the pattern
for every signal. It is worth mentioning that this every signal has a one-to-one
relationship with the bits from PGMOUT register. For example, if pattern 0xAA is
desired the following set must be done in the PGMOUT register (set bits 1, 3, 5, 7
bits to high ‘1’
logic):
After the WEX is configured in
Pattern Generation mode, the user can toggle each signals state using the buffer
register.
WEX0.PGMOUT = ~WEX0.PGMOUT;
A delay is added to see when the
toggling
occurs.
_delay_us(25);
Port A pins 0-7 (PA0-7) are set as
outputs by writing a ‘1’ to the corresponding bits in the Direction
register of the port. These GPIOs are configured only to obtain a visible
output.
The last step for this example is to enable the TCE module because the source clock
that passes from TCE to WEX is needed for the update of the defined
patterns.
TCE0.CTRLA = TCE_ENABLE_bm;
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